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Pseudorandom testing of microprocessors at instruction/data flow level

  • Session 6 Testing
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Dependable Computing — EDCC-2 (EDCC 1996)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1150))

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Abstract

A universal approach to testing microprocessors is described. It is based on a test program with pseudorandom stream of instructions and data. An original software generator of such programs has been presented. Theoretical studies and many simulation experiments show that the proposed approach has similar properties to pseudorandom testing at the circuit level and covers a lot of fault models.

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Andrzej Hlawiczka João Gabriel Silva Luca Simoncini

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© 1996 Springer-Verlag Berlin Heidelberg

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Sosnowski, J., Kuśmierczyk, A. (1996). Pseudorandom testing of microprocessors at instruction/data flow level. In: Hlawiczka, A., Silva, J.G., Simoncini, L. (eds) Dependable Computing — EDCC-2. EDCC 1996. Lecture Notes in Computer Science, vol 1150. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-61772-8_42

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  • DOI: https://doi.org/10.1007/3-540-61772-8_42

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-61772-3

  • Online ISBN: 978-3-540-70677-9

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