On-line testing of an off-the-shelf microprocessor board for safety-critical applications

  • F. Corno
  • M. Damiani
  • L. Impagliazzo
  • P. Prinetto
  • M. Rebaudengo
  • G. Sartore
  • M. Sonza Reorda
Session 4 Fault Tolerant Design Industrial Track Paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1150)


The paper describes the strategy adopted to implement on-line test procedures for a commercial microprocessor board used in an automated light-metro control system. Special care has been devoted to chose the most effective test strategy for memory elements, processors, and caches, while guaranteeing a minimum impact on the normal behavior of the whole system. Implementation of the described techniques will significantly improve the system ability to safely react to possible faults. This will be quantitatively determined in the subsequent dependability evaluation phase.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1996

Authors and Affiliations

  • F. Corno
    • 1
  • M. Damiani
    • 2
  • L. Impagliazzo
    • 3
  • P. Prinetto
    • 1
  • M. Rebaudengo
    • 1
  • G. Sartore
    • 4
  • M. Sonza Reorda
    • 1
  1. 1.Dipartimento di Automatica e InformaticaPolitecnico di TorinoTorinoItaly
  2. 2.Dip. Elettronica e InformaticaUniversità di PadovaPadovaItaly
  3. 3.CRISCentro Ricerche Innovative per il SudNapoliItaly
  4. 4.Ansaldo TrasportiGenevaItaly

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