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Formal support for the ELLA hardware description language

  • Howard Barringer
  • Graham Gough
  • Brian Monahan
  • Alan Williams
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 987)

Abstract

We describe the development of formal verification support tools for the commercial hardware description language ELLA, which are embedded into an industrial-style hardware design system, to be utilised by hardware engineers. A formal semantics for ELLA is given using various semantic representations, including state machines and process algebraic terms, so that different formal analysis methods can be used. In particular, a novel symbolic verification method can be used with the process terms generated from ELLA-text, giving a high level and efficient means of verifying the correctness of ELLA designs.

Keywords

hardware design tools formal semantics symbolic verification ELLA 

References

  1. 1.
    J. D. Morison and A. S. Clarke. ELLA2000: A Language for Electronic System Design. McGraw-Hill, 1993.Google Scholar
  2. 2.
    D. Schmidt. Denotational Semantics. Allyn and Bacon, 1986.Google Scholar
  3. 3.
    H. Barringer, G. Gough, T. Longshaw, B. Monahan, M. Peim, and A. Williams. Semantics and Verification for Boolean Kernel ELLA using IO Automata. In Advanced Research Workshop on Correct Hardware Design Methodologies (CHARME'91), Turin, Italy, May 1991.Google Scholar
  4. 4.
    R. Milner. Communication and Concurrency. Prentice Hall, 1989.Google Scholar
  5. 5.
    N. Shankar, S. Owre, and J. M. Rushby. The PVS Proof Checker: A Reference Manual (Beta Release). Technical report, Computer Science Laboratory, SRI International, March 1993.Google Scholar
  6. 6.
    H. Barringer, G. Gough, B. Monahan, and A. Williams. A Process Algebra Foundation for Reasoning about Core ELLA. Technical Report UMCS-94-12-1, University of Manchester, December 1994.Google Scholar
  7. 7.
    H. Barringer, G. Gough, B. Monahan, and A. Williams. A State Evolution Method for Verifying Hardware Systems. Technical Report UMCS-95-7-1, University of Manchester, July 1995. Also to be presented as a poster at CHARME'95, Frankfurt, Germany, October 1995.Google Scholar
  8. 8.
    Computer General Electronic Design, Chippenham, Wiltshire, United Kingdom. The ELLA Language Reference Manual, 5.1 edition, February 1991.Google Scholar
  9. 9.
    D. Coelho. The VHDL Handbook. Kluwer, 1989.Google Scholar
  10. 10.
    N.A. Lynch and M.R. Tuttle. An Introduction to Input/Output Automata. Technical Report MIT/LCS/TM-373, MIT, November 1988.Google Scholar
  11. 11.
    Formal Verification Support for ELLA. Technical report, DRA (Malvern), Harlequin Ltd. (Cambridge), and University of Manchester, Formal Verification Support for ELLA, IED project 4/1/1357, in JFIT Conference, December 1992.Google Scholar
  12. 12.
    Harlequin Ltd, Cambridge UK. Information about LispWorks is available on the World-Wide Web, URL: http://www.harlequin.co.uk/full/products/sp/lispworks.html.Google Scholar
  13. 13.
    H. Barringer, G. Gough, B. Monahan, and A. Williams. A Semantics for Core ELLA. Project Report D2.3b, Formal Verification Support for ELLA, IED Project 4/1/1357, University of Manchester, November 1992.Google Scholar
  14. 14.
    C.A.R. Hoare. Communicating Sequential Processes. Prentice-Hall, 1985.Google Scholar
  15. 15.
    G. A. McCaskill and G. Milne. Hardware Description and Verification Using the Circal-System. Technical Report HDV-24-92, Department of Computer Science, University of Strathclyde, June 1992.Google Scholar
  16. 16.
    T. Bolognesi and E. Brinksma. Introduction to the ISO Specification Language LOTOS. Computer Networks and ISDN Systems, 14(1), 1987.Google Scholar
  17. 17.
    H. Barringer, G.D. Gough, B.Q. Monahan, and A. Williams. A Process Algebraic Semantics for Core ELLA. Technical Report UMCS-93-2-1, University of Manchester, November 1994.Google Scholar
  18. 18.
    H. Barringer, G. Gough, B. Monahan, and A. Williams. The ELLA Verification Environment: A Tutorial Introduction. Technical Report UMCS-94-12-2, University of Manchester, December 1994.Google Scholar
  19. 19.
    R. Kumar, K. Schneider, and T. Kropf. Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment. Formal Methods in System Design, 2, 1993.Google Scholar
  20. 20.
    M. Gordon and A. Pitts. The HOL logic and system (Chapter 3). In J. Bowen, editor, Towards Verified Systems, pages 49–70. Elsevier, October 1994.Google Scholar
  21. 21.
    T. Kropf, R. Kumar, and K. Schneider. Embedding Hardware Verification within a Commercial Design Framework. In G. Milne and L. Pierre, editors, Correct Hardware Design and Verification Methods (CHARME '93), LNCS, volume 683, pages 242–257, Arles, France, May 1993. Springer-Verlag.Google Scholar
  22. 22.
    F. Corella. Automated High-Level Verification against Clocked Algorithmic Specifications. In D. Agnew, L. Claesen, and R. Camposano, editors, CHDL '93, Canada, 1993. North-Holland.Google Scholar
  23. 23.
    A. Cohn. A Proof of Correctness of the Viper Microprocessor: The First Level. In G. Birtwistle and P. Subrahmanyam, editors, VLSI Specification, Verification and Synthesis, 1989.Google Scholar
  24. 24.
    E.M. Clarke, E.A. Emerson, and A.P. Sistla. Automatic Verification of finite state concurrent systems using Temporal Logic Specifications. ACM Transactions on Programming Languages and Systems, 8(2), 1986.Google Scholar
  25. 25.
    H. Barringer, M. Fisher, and G.D. Gough. Fair SMG and Linear Time Model Checking. In Sifakis [33].Google Scholar
  26. 26.
    R.E. Bryant. Graph-Based Algorithms for Boolean Function Manipulation. IEEE Transactions on Computers, C-35(8):677–691, 1986.Google Scholar
  27. 27.
    J.R. Burch, E.M. Clarke, and D.E. Long. Representing Circuits More Efficiently in Symbolic Model Checking. In DAC91, 1991.Google Scholar
  28. 28.
    O. Coudert, C. Berthet, and J-C. Madre. Verification of Synchronous Sequential Machines based on Symbolic Execution. In Sifakis [33].Google Scholar
  29. 29.
    N. Shankar. Verification of Real-Time Systems Using PVS. In C. Courcoubetis, editor, Computer Aided Verification, (CAV '93), LNCS, volume 697, Elounda, Greece, June 1993. Springer-Verlag.Google Scholar
  30. 30.
    M. Hennessy and H. Lin. Proof Systems for Message-Passing Process Algebras. Technical Report 5/93, University of Sussex, 1993.Google Scholar
  31. 31.
    K.G.W. Goossens. Embedding Hardware Description Languages in Proof Systems. PhD thesis, University of Edinburgh, 1992.Google Scholar
  32. 32.
    R. Boulton, M. Gordon, J. Herbert, and J. Van Tassel. The HOL Verification of ELLA Designs. Technical report, University of Cambridge Computer Laboratory, 1990.Google Scholar
  33. 33.
    J. Sifakis, editor. Automatic Verification Methods for Finite State Systems, LNCS, volume 407, Grenoble, France, 1989. Springer-Verlag.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1995

Authors and Affiliations

  • Howard Barringer
    • 1
  • Graham Gough
    • 1
  • Brian Monahan
    • 1
  • Alan Williams
    • 1
  1. 1.University of ManchesterUK

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