Reconfigurable logic for fault tolerance
A novel application of SRAM-based FPGA technology is the development of fault tolerant systems in which reconfigurability is exploited in order to implement inherent redundancy. The approach is to use SRAM-based FPGA's in a mode where fault tolerance is achieved by detection of a fault and its location, and recovery from the fault via device reconfiguration. The scope of this paper is limited only to the demonstration of the flexibility of the SRAM-based FPGA architecture to tolerate faults which have been detected and located by means not described herein. Computer simulations of random faults and recovery from the faults has been performed. Results are described validating this technique and the success rate in terms of both routability and performance.
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