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A new neural network approach to the floorplanning of hierarchical VLSI designs

  • M. Saheb Zamani
  • G. R. Hellestrand
Neural Networks for Communications and Control
Part of the Lecture Notes in Computer Science book series (LNCS, volume 930)

Abstract

In this paper, we introduce a new neural network approach to the floorplanning of VLSI (Very Large Scale Integrated circuit) designs. The network used is a Kohonen self-organising map. An abstract specification of the design is converted to a set of appropriate input vectors fed to the network at random. At the end of the process, the map shows a 2-dimensional plane of the design in which the modules with higher connectivity are placed adjacent to each other, hence minimising total connection length in the design. The approach can be extended to consider external connections and is able to floorplan a rectilinear boundary. These features makes the approach capable of floorplanning hierarchically specified designs. Since only the global ordering phase is needed for the floorplanner, the process is fast.

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Copyright information

© Springer-Verlag Berlin Heidelberg 1995

Authors and Affiliations

  • M. Saheb Zamani
    • 1
  • G. R. Hellestrand
    • 1
  1. 1.Computer and Systems Technology Laboratory, School of Computer Sc. and Eng.The University of New South WalesSydneyAustralia

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