A VLSI current mode synapse chip
Two-quadrant multipliers are required for several neural network architectures. The efficient implementation of these architectures in silicon requires the development of small, compact, reliable and accurate hardware multipliers. This paper details simulation and hardware results for the DYnamic Mirror PuLsed Experimental Synapse (DYMPLES) Chip. DYMPLES is an analogue current mode chip which utilises dynamic current mirrors and current matching to implement two quadrant multiplication based on the pulse stream approach. HSPICE simulations indicate that the DYMPLES circuits produce excellent current matching and this is reinforced by the hardware results.
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- HAMILTON, A., MURRAY, A. F., BAXTER D. J., CHURCHER, S., REEKIE, H. M., and TARASSENKO, L.: ‘Integrated pulse-stream neural networks — results, issues and pointers', IEEE Transactions on Neural Networks, Vol. 3, No. 3, 1992, pp. 385–93.Google Scholar
- LIPPMANN, R. P.: ‘An introduction to computing with neural nets', IEEE ASSP Magazine, 1987, Vol. 4, pp. 4–22.Google Scholar
- VERLEYSEN, M., THISSEN, P., VOZ, J-L., and MADRENAS, J.: ‘An analog processor architecture for a neural network classifier', IEEE Micro, Vol. 14, No. 3, June 1994, pp. 16–28.Google Scholar
- VITTOZ, E. A., and WEGMANN, G.: ‘Dynamic current mirrors’ in TOUMAZOU, C., LIDGEY, F. J., and HAIGH, D. G. (Eds.), ‘Analogue IC design: the current-mode approach’ (Peter Peregrinus Ltd., London, 1990), pp.297–326.Google Scholar
- HAMILTON, A.: 'synaptic weight representation in pulsed neural network VLSI: Voltage or Current ?', Proc. of Int. Conf. on Neural Information Processing, Seoul 1994, pp.353–8.Google Scholar