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A massively parallel neurocomputer with a reconfigurable arithmetical unit

  • Alfred Strey
  • Narcis Avellana
  • Raul Holgado
  • J. Alberto Fernández
  • Ramon Capillas
  • Elena Valderrama
Implementation
Part of the Lecture Notes in Computer Science book series (LNCS, volume 930)

Abstract

This paper presents a massively parallel neurocomputer system which is mainly based on a new reconfigurable arithmetical unit optimized for the simulation of neural networks. The system offers a very high performance for all typical neural network operations combined with a high flexibility to adapt the available hardware resources to the requirements of a user-selected neural network model. The main system features are the support of many different bitlengths, a high memory bandwidth, a good scalability and a dynamic reconfigurability.

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References

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Copyright information

© Springer-Verlag Berlin Heidelberg 1995

Authors and Affiliations

  • Alfred Strey
    • 1
  • Narcis Avellana
    • 2
  • Raul Holgado
    • 3
  • J. Alberto Fernández
    • 3
  • Ramon Capillas
    • 3
  • Elena Valderrama
    • 3
  1. 1.Abteilung NeuroinformatikUniversität UlmUlmGermany
  2. 2.Abteilung Allgemeine Elektrotechnik und MikroelektronikUniversität UlmUlmGermany
  3. 3.Departemento de Diseño de CIsUniversidad Autonoma de Barcelona - C.N.M.BellaterraSpain

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