A combination of clausal and non clausal temporal logic programs

  • Shinji Kono
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 897)


We have developed Tokio interpreter[5] for first order Interval Temporal Logic[11] and an automatic theorem prover [6,7] for Propositional Interval Temporal Logic. The verifier features deterministic tableau expansion and binary decision tree representation of subterms. Combining these, we can avoid repeated similar clausal form time constraints, and it is possible to execute wider range of specifications without time-backtracking.


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  1. 1.
    W. Clocksin and C. Mellish. Programming in Prolog. Springer-Verlag, 1981.Google Scholar
  2. 2.
    G. de Jong. An Automata Theoretic Approach to Temporal Logic. In Computer Aided Verification. Springer-Verlag, July 1991. 3rd International Workshop, CAV'91.Google Scholar
  3. 3.
    R. Hale. Temporal logic programming, 1988.Google Scholar
  4. 4.
    H. Hirahashi. Design Verification of Sequential Machines Based on a Model Checking Algorithm of ε-free Regular Temporal Logic. Technical Report CMU-CS-88-195, Department of Computer Science, Carnegie-Mellon University, September 1988.Google Scholar
  5. 5.
    S. Kono, T. Aoyagi, M. Fujita, and H. Tanaka. Verification of Temporal Logic Programming Language Tokio. In Logic Programming Conference '86, 1986. (in Japanese).Google Scholar
  6. 6.
    S. Kono. Automatic Verification of Interval Temporal Logic. Technical Report SCSL-TM-92-007, Sony Computer Science Laboratory Inc., October 1992.Google Scholar
  7. 7.
    S. Kono. Automatic verification of interval temporal logic. In 8th British Colloquium For Theoretical Computer Science, March 1992.Google Scholar
  8. 8.
    G. Milne. CIRCAL: A Calculus for Circuit Description. Integration, Vol. 1, No. 2, pp. 121–160, 1983.Google Scholar
  9. 9.
    R. Milner. A Calculus of Communicating Systems, volume 92 of Lecture Note in Computer Science. Springer-Verlag, 1980.Google Scholar
  10. 10.
    B. Mishra and E. Clarke. Automatic and hierarchical verification of asynchronous circuits using temporal logic. Technical Report CMU-CS-83-155, Dept. of Computer Science, Carnegie-Mellon Univ., September 1983.Google Scholar
  11. 11.
    B. Moszkowski. Reasoning about digital circuit. Technical Report No.STAN-CS-83-970, Dept. of C.S. Stanford Univ, July 1983.Google Scholar
  12. 12.
    N. Rescher and A. Urquhart. Temporal Logic. Springer-Verlag, 1971.Google Scholar
  13. 13.
    R. Rosner and A. Pnueli. A choppy logic, 1986.Google Scholar
  14. 14.
    P. Wolper. Synthesis of communicating processes from temporal logic specifications. Technical Report STAN-CS-82-925, Stanford University, 1982.Google Scholar

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© Springer-Verlag Berlin Heidelberg 1995

Authors and Affiliations

  • Shinji Kono

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