Self-timed communication strategies for massively parallel systolic architectures

  • R. S. Hogg
  • D. W. Lloyd
  • W. I. Hughes
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 854)


Self-timing provides an attractive alternative to synchronous design in order to overcome scalability problems and fixed processing time. The self-timed approach abolishes the need for a clock signal at any level in the system, and instead uses local control mechanisms to ensure the circuit behaves correctly independent of communication delays. This paper introduces self-timed design strategies developed for use in massively parallel array architectures. These strategies promote bit-serial elastic control and data communication in scalable array architectures. A number of different solutions will be proposed and are assessed on a cost/performance basis resulting on application driven guidelines for design of communication strategies.


Scalable Self-timing Bit-serial Elastic Massively-Parallel 


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Copyright information

© Springer-Verlag Berlin Heidelberg 1994

Authors and Affiliations

  • R. S. Hogg
    • 1
  • D. W. Lloyd
    • 1
  • W. I. Hughes
    • 1
  1. 1.Department of Computer ScienceSheffield Hallam UniversitySheffieldEngland

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