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Introducing fairness in CSP systems specified with state variables

  • Ricardo Peña
  • Luis A. Galán
Poster Session
Part of the Lecture Notes in Computer Science book series (LNCS, volume 817)

Abstract

A framework is presented to show formally that a parallel system is fair with respect to any set of events. Systems are specified by means of a set of variables, a set of guarded transitions and a set of liveness conditions, using an already presented technique [PA93]. Their semantics are given in the CSP model [BRH84]. The proofs use normal predicate logic and noetherian induction. Invariants are an important piece of information in the development of the proofs. A non trivial case study is developed.

keywords

design of parallel programs specification verification formal development methodologies semantics 

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References

  1. [AO91]
    K.R. Apt and E.-R. Olderog. Verification of sequential and concurrent programs. Springer-Verlag, 1991.Google Scholar
  2. [BRH84]
    S.D. Brookes, A.W. Roscoe, and C.A.R. Hoare. A theory for communicating sequential processes. Journal of the ACM, 31:560–599, 1984.CrossRefGoogle Scholar
  3. [CM88]
    K.M. Chandy and J. Misra. Parallel Program Design: A Foundation. Addison Wesley, Reading, Ma, 1988.Google Scholar
  4. [Fra86]
    N. Francez. Fairness. Springer-Verlag, 1986.Google Scholar
  5. [PA93]
    R. Peña and L.M. Alonso. A technique for specifying and refining TCSP processes by using guards and liveness conditions. In M.-C. Gaudel and J.P. Jouannaud, editors, TAPSOFT'93, pages 328–342. Springer-Verlag, 1993. LNCS 668.Google Scholar
  6. [PG94]
    R. Peña and L.A. Galán. Introducing fairness in CSP systems specified with state variables. Technical Report DIA-UCM 94/1, Universidad Complutense de Madrid, 1994.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1994

Authors and Affiliations

  • Ricardo Peña
    • 1
  • Luis A. Galán
    • 1
  1. 1.Departamento de Informática y AutomáticaUniversidad Complutense de MadridMadridSpain

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