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Modelling bit vectors in HOL: The word library

  • Wai Wong
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 780)

Abstract

The bit vector is one of the fundamental data objects in hardware specification and verification. The modelling of bit vectors is a key to the success of a hardware verification project. This paper describes a pragmatic approach to modelling bit vectors in higher-order logic and an implementation as a system library in the HOL theorem prover. In this approach, bit vectors are represented using a polymorphic type. Restricted quantifications are used to simulate dependent types to model the sizes of the vectors. The library consists of many theorems asserting the basic properties of the bit vectors and some useful tools for reasoning about them. Examples showing the effective use of the library are described.

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Copyright information

© Springer-Verlag Berlin Heidelberg 1994

Authors and Affiliations

  • Wai Wong
    • 1
  1. 1.Computer Laboratory New Museums SiteUniversity of CambridgeCambridge

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