Synthesis of O(lg n) testable trees

  • Hongzhong Wu
  • G. Hotz
Part of the Lecture Notes in Computer Science book series (LNCS, volume 710)


This paper presents a method of synthesizing basic logical functions for the testability. Using this method one can modify a tree system to improve its testability without changing its tree-like logical structure. Especially, one can embed every tree system in an O(lg n) testable tree system. This method provides an alternative to trade the hardware overhead for the low test complexity when extra gates are allowed, and the number of access terminals is limited.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    J. A. Abraham, and D. D. Gajski: Design of testable structures defined by simple loops. IEEE Trans. on Computers, C-30,No. 11, pp875–884, 1981.Google Scholar
  2. 2.
    B. Becker, and J. Hartmann: Optimal-time multipliers and C-testability. Proceedings of the 2nd Annual Symposium on Parallel Algorithms and Architectures. pp146–154, 1990.Google Scholar
  3. 3.
    B. Becker, and U. Sparmann: Computations over Finite Monoids and their Test Complexity. Theoretical Computer Science, pp225–250, 1991.Google Scholar
  4. 4.
    D. Bhattacharya, and J. P. Hayes: Fast and easily testable implementation of arithmetic functions. Proceedings of the 16th International Symposium on Fault Tolerant Computing Systems, pp324–329, July 1986.Google Scholar
  5. 5.
    J. P. Hayes: On realizations of boolean functions requiring a minimal or near-minimal number of tests. IEEE Trans. on Computers C-20, pp1506–1513, 1971.Google Scholar
  6. 6.
    J.P. Hayes: On modifying logic networks to improve their diagnosability. IEEE Trans. Comput. C-23(1), pp56–62, 1974.Google Scholar
  7. 7.
    G. Markowsky: A straightforward technique for producing minimal multiple fault test sets for fanout-free combinational circuits. Technical Report RC 6222, IBM T. J. Watson Research Center, Yorktown Heights, 1976.Google Scholar
  8. 8.
    K.K. Saluja, and S. M. Reddy: On minimally testable logic networks. IEEE Trans. Comput. C-23(1), pp552–554, 1974.Google Scholar
  9. 9.
    S.C. Seth, and K.L. Kodandapani: Diagnosis of faults in linear tree networks. IEEE Trans. on Computers, C-26(1), pp29–33, Jan. 1977.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1993

Authors and Affiliations

  • Hongzhong Wu
    • 1
  • G. Hotz
    • 1
  1. 1.FB-InformatikSaarland UniversityGermany

Personalised recommendations