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International Workshop on Field Programmable Logic and Applications

FPL 1992: Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping pp 192–198Cite as

Using FPGAs to prototype a self-timed computer

  • Rapid Prototyping
  • Conference paper
  • First Online:

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 705))

Abstract

The NSR (non-synchronous RISC) architecture is an architecture for a general purpose processor structured as a collection of self-timed blocks that operate concurrently and communicate over bundled data channels in the style of micropipelines [3, 6]. A 16-bit version of the NSR architecture has been implemented using Actel field programmable gate arrays (FPGAs). Each of the major components of the NSR is implemented using one or two Actel FPGA chips using a library of self-timed circuit modules [1, 2]. This prototype implementation is being used to gain experience with the NSR architecture and to gather statistics about the architectural choices. The Actel FPGAs have proven to be extremely useful in quickly prototyping this novel computer architecture.

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References

  1. Erik Brunvand. A cell set for self-timed design using actel FPGAs. Technical Report UUCS-91-013, University of Utah, 1991.

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  2. Erik Brunvand. Implementing self-timed systems with FPGAs. In W. R. Moore and W. Luk, editors, FPGAs, chapter 6.2, pages 312–323. Abingdon EE&CS Books, 1991.

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  3. Erik Brunvand. Translating Concurrent Communicating Programs into Asynchronous Circuits. PhD thesis, Carnegie Mellon University, 1991. Available as Technical Report CMU-CS-91-198.

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Author information

Authors and Affiliations

  1. University of Utah, 84112, Salt Lake City, Utah, USA

    Erik Brunvand

Authors
  1. Erik Brunvand
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Editor information

Herbert Grünbacher Reiner W. Hartenstein

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© 1993 Springer-Verlag Berlin Heidelberg

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Brunvand, E. (1993). Using FPGAs to prototype a self-timed computer. In: Grünbacher, H., Hartenstein, R.W. (eds) Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping. FPL 1992. Lecture Notes in Computer Science, vol 705. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-57091-8_44

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  • DOI: https://doi.org/10.1007/3-540-57091-8_44

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-57091-2

  • Online ISBN: 978-3-540-47902-4

  • eBook Packages: Springer Book Archive

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