Advertisement

Chameleon: A workstation of a different colour

  • Beat Heeb
  • Cuno Pfister
Rapid Prototyping
Part of the Lecture Notes in Computer Science book series (LNCS, volume 705)

Abstract

Chameleon is an experimental workstation based on a RISC processor. It provides unprecedented flexibility and speed for certain applications due to the use of RAM-configurable Field Programmable Gate Arrays (FPGAs). FPGAs are used to replace glue logic as well as to provide a non-dedicated computation resource. This resource can be regarded as a general purpose coprocessor which can be reconfigured and thus transformed into a special purpose coprocessor in milliseconds at run-time. The coprocessor can be used both for handling complex input/output functions as well as to replace time-critical inner loops of user programs running on the central processing unit. Chameleon radically relies on FPGAs for all input/output functions. It serves as a means to probe the limits of FPGA usage while at the same time being the development system for its own FPGA circuits.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Algotronix Ltd.: CAL1024 Datasheet (1990)Google Scholar
  2. 2.
    P. Bertin, D. Roncin, J. Vuillemin: Introduction to Programmable Active Memories. Research Report No. 3, DEC Paris Research Laboratory (1989)Google Scholar
  3. 3.
    K. M. Chandy, J. Misra: Parallel Program Design: A Foundation. Addison Wesley (1988)Google Scholar
  4. 4.
    Z. Guo, W. H. Richard: Parallel Thinning with Two-Subiteration Algorithms. Communications of the ACM, vol. 32, no. 3, pp. 359–373 (1989)CrossRefGoogle Scholar
  5. 5.
    B. Heeb: Debora: A System for the Development of Field Programmable Hardware and its Application to a Reconfigurable Computer. Ph. D. thesis no. 10049, ETH Zürich (1993)Google Scholar
  6. 6.
    LSI Logic Corporation: LR33000 MIPS Embedded Processor User's Manual.Google Scholar
  7. 7.
    C. Pfister: CALLAS: A Physical Design Framework for Configurable Array Logic. Ph. D. thesis no. 9940, ISBN 3 7281 1967 9, ETH Zürich (1992)Google Scholar
  8. 8.
    M. Reiser, N. Wirth: Programming in Oberon, Steps Beyond Pascal and Modula. Addison-Wesley (1992)Google Scholar
  9. 9.
    N. Wirth, J. Gutknecht: Project Oberon, The Design of an Operating System and Compiler. Addison-Wesley (1992)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1993

Authors and Affiliations

  • Beat Heeb
    • 1
    • 2
  • Cuno Pfister
    • 1
    • 2
  1. 1.Institut für ComputersystemeETH ZürichZürichSwitzerland
  2. 2.Oberon microsystems Inc.BaselSwitzerland

Personalised recommendations