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Hardware design for self organizing feature maps with binary input vectors

  • S. Rüping
  • U. Rückert
  • K. Goser
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 686)

Abstract

A number of applications of self organizing feature maps require a powerful hardware. The algorithm of SOFMs contains multiplications, which need a large chip area for fast implementation in hardware. In this paper a resticted class of self organizing feature maps is investigated. Hardware aspects are the fundamental ideas for the restictions, so that the necessary chip area for each processor element in the map can be much smaller then before and more elements per chip can work in parallel. Binary input vectors, Manhatten Distance and a special treatment of the adaptation factor allow an efficient implementation. A hardware design using this algorithm is presented. VHDL simulations show a performance of 25600 MCPS (Million Connections Per Second) during the recall phase and 1500 MCUPS (Million Connections Updates Per Second) during the learning phase for a 50 by 50 map. A first standard cell layout containing 16 processor elements and full custom designs for the most important parts are presented.

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References

  1. [1]
    T. Kohonen. Self-Organization and Associative Memory. Springer Verlag Heidelberg New York Tokio, 1984Google Scholar
  2. [2]
    D. Hammerstrom, N. Nguyen. An Implementation of Kohonen's Self-Organizing Map on the Adaptive Solutions Neurocomputer. Proceedings of Artificial Neural Networks 1991, pp. 715–720. North-Holland, 1991Google Scholar
  3. [3]
    V. Tryba. Selbstorganisierende Karten: Theorie, Anwendung und VLSI-Implementierung. (in German). Dissertation an der Universität Dortmund, Abteilung Elektrotechnik. 1992Google Scholar
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    U. Ramacher, U. Rückert, J.A. Nossek. Proceedings of the 2nd International Conference on Microelectronics for Neural Networks. Kyrill &Method Verlag, München, 1991Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1993

Authors and Affiliations

  • S. Rüping
    • 1
  • U. Rückert
    • 1
  • K. Goser
    • 1
  1. 1.Dept. of Electrical EngineeringUniversity of DortmundDortmund 50Germany

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