A model based approach to the performance analysis of multi-layer networks realised in linear systolic arrays
An analytical model is presented for assessing the hardware performance of multi-layer neural networks realised in linearly connected systolic arrays. Metrics to assess latency, throughput, and computational and I/O bandwidth during the recall stage are derived and applied in the analysis of a variety of multi-layer structures. The effects of the performance metrics on networks with one and two hidden layers are compared in the paper. It is found that a single hidden layer is beneficial to the computational bandwidth across a wide range of hidden layer dimensions, whereas the throughput rate of networks with two hidden layers is higher than for a single layer, even when more hidden neurons are present.
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