System specification and refinement in temporal logic
We consider two types of specifications of reactive systems: requirement specification which lists properties the system should satisfy, and System specification which describes the response of the system to each incoming input. Some of the differences between these two styles of specification are analyzed with the conclusion that both types are needed in an orderly system development.
Traditionally, temporal logic was used for requirement specification while process algebras, such as csp and ccs, were used for system specification. Recent developments, mainly represented in Lamport's temporal logic of actions (tla), demonstrated that temporal logic can be used effectively also for system specification.
This paper explores the use of temporal logic for systems specification, evaluates some of the advantages and disadvantages of such a use, and demonstrates the use of temporal logic for refinement and systematic development of systems. To allow simulation of a single high level step by several lower level steps, we go back to the temporal logic tlr which is based on a dense time domain, such as the reals.
KeywordsTemporal logic requirement specification system specification validation refinement simulation stuttering robustness temporal semantics
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