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Comparing software pipelining for an operation-triggered and a transport-triggered architecture

  • Jan Hoogerbrugge
  • Henk Corporaal
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 641)

Abstract

This paper reports the results of a comparison between a new class of architectures, called transport-triggered architectures, and traditional architectures, called operation-triggered architectures. It does this comparison by means of the MOVE-i860, which is a transport-triggered approximation of the i860. Several benchmarks are scheduled for the MOVE-i860 by a software pipelining scheduler. By scheduling according to three scheduling disciplines, we are able to measure the advantages of transport-triggered architectures.

The results of the experiments show that transport-triggered architectures perform better than operation-triggered architectures with similar hardware.

References

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    Henk Corporaal and Hans (J.M.) Mulder. MOVE: A Framework for High-Performance Processor Design. In Supercomputing-91, Albaquerque, November 1991.Google Scholar
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    Jan Hoogerbrugge. Software Pipelining for Transport-Triggered Architectures. Master's thesis, Delft University of Technology, Delft, The Netherlands, December 1991.Google Scholar
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    John L. Hennessy and David A. Patterson. Computer Architecture, a Quantitative Approach. Morgan Kaufmann publishers, 1990.Google Scholar
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    Intel, Santa Clara, CA. i860 64-bit Microprocessor Programmer's Reference Manual, 1989.Google Scholar
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    Monica S. Lam. A Systolic Array Optimizing Compiler. The Kluwer International Series in Engineering and Computer Science. Kluwer Academic Publishers, Norwell, Massachusetts, 1989.Google Scholar
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    Monica S. Lam. Software Pipelining: An Effective Scheduling Technique for VLIW Machines. In Proceedings of the SIGPLAN '88 Conference on Programming Language Design and Implementation, pages 318–328, June 1988.Google Scholar
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    Jan Hoogerbrugge, Henk Corporaal, and Hans Mulder. Software Pipelining for Transport-Triggered Architectures. In Proceedings of the 24th Annual Workshop on Microprogramming, pages 74–81, Albaquerque, New Mexico, November 1991.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1992

Authors and Affiliations

  • Jan Hoogerbrugge
    • 1
  • Henk Corporaal
    • 1
  1. 1.Department of Electrical Engineering Section Computer Architecture and Digital SystemsDelft University of TechnologyThe Netherlands

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