Abstract
The Liverpool Single-transputer library [10] was ported to the i860 as part of the Esprit Genesis project, P2702. There are approximately 250 routines in this library, including the BLAS (which are a well-known set of subroutines providing functions commonly used in numerical computing, see [8],[3], [2],[1]) and a set of vector routines, known as the FLO routines
This strategy is expensive to implement on new processors, especially highly structured ones such as the i860. The software was, therefore, implemented with a similar philosophy to that of the hardware designers in designing the hardware. It was coded in a modular form to utilise a few carefully optimised core routines.
The results were encouraging: the number of assembler routines was significantly reduced and large speed-ups were obtained over Fortran.
Thanks to Cliff Addison and Mike Delves of CMSR for help and comments on this paper. Partial funding for this work was provided by Esprit Genesis project, P2702.
This work was carried out while the author was at N.A. Software, Liverpool
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Wilkinson, B., Mulholland, L.S. (1992). An implementation of the BLAS on the i860: A RISC approach to software for RISC devices. In: Bougé, L., Cosnard, M., Robert, Y., Trystram, D. (eds) Parallel Processing: CONPAR 92—VAPP V. VAPP CONPAR 1992 1992. Lecture Notes in Computer Science, vol 634. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-55895-0_423
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DOI: https://doi.org/10.1007/3-540-55895-0_423
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