Interconnection networks based on block designs

  • Volker Hatz
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 634)


We discuss a method constructing efficient multiprocessor networks based on combinatorial designs. The principal goal is to reduce the network diameter while keeping the number of processor ports small. With a smart multiplexing technique and the use of a class of bipartite graphs we are able to construct e.g. a 1210 processor machine with 4 ports/processor and diameter 2.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    J. C. Bermond, J.Bond, M.Paoli, C. Peyrat, “Graphs and Interconnection Networks: Diameter and Vulnerability”, in Proceedings of the Ninth British Combinatorial Conference, 1983, pp.1–30Google Scholar
  2. 2.
    T. Beth, D. Jungnickel, H. Lenz, “Design Theory”, B.I.-Wissenschaftsverlag, 1985Google Scholar
  3. 3.
    T. Beth, V. Hatz, “A Restricted Crossbar Implementation and its Applications”, ACM Computer Architecture News, Vol. 19, December 1991Google Scholar
  4. 4.
    T. Beth, V. Hatz, “Design Machines: Algebraically Well Described Interconnection Networks”, to appear in Journal on Designs, Codes and CryptographyGoogle Scholar
  5. 5.
    C. J.Colbourn, P. C. van Oorschot, “Applications of Combinatorial Designs in Computer Science”, ACM Computing Surveys, Vol.21, No.2, June 1989Google Scholar
  6. 6.
    C. Wu, T. Feng, “Tutorial: Interconnection Networks for Parallel and Distributed Processing”, Computer Society Press, 1984Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1992

Authors and Affiliations

  • Volker Hatz

There are no affiliations available

Personalised recommendations