XPRAM model and programming interface
The widespread use of parallel hardware is partly held back by the lack of a unifying model of parallel computation with predictable performance. Valiant's Bulk Synchronous Parallel (BSP) model has been proposed as one candidate to fill this gap  on a general class of distributed memory MIMD machines. A practical demonstration of this approach has been shown by May . We build on Valiant's work to specify an XPRAM programming model and interface. Care has been taken to ensure that the interface is scalable on a general class of MIMD computers that support a combining network .
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