καππα: A Kernel Andorra Prolog

Parallel architecture design
  • Remco Moolenaar
  • Henk Van Acker
  • Bart Demoen
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 569)


This paper describes the design of a parallel implementation for Kernel Andorra Prolog (KAP) named καππα. The main features of καππα are AND/OR parallelism, committed choice guard evaluation combined with don't know nondeterminism and constraint operations on variables. The design is based on the Warren Abstract Machine with some important extensions. One of the main problems involving AND/OR parallel systems is the efficient handling of variables. We have adopted the PEPSys hashing scheme with additional mechanisms for handling guard blocking and waiting. A καππα computation is divided into a number of steps. Every step contains a deterministic phase and a nondeterministic phase. The deterministic phase is executed in a normal Prolog-like way. The nondeterministic phase prunes the tree or divides the tree into a number of OR-branches, which share a common part of the tree. Each OR-branch is executed in the usual Prolog-like manner.


AND/OR parallelism Andorra Kernel Andorra Prolog 


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  1. [1]
    Khayri A. M. Ali, Roland Karlsson, “The Muse Or-Parallel Prolog Model and its Performance”, in Proceedings of the 1990 North American Conference on Logic Programming, pp757–776, MIT Press, 1990.Google Scholar
  2. [2]
    Reem Bahgat, Steve Gregory, “Pandora: Non-deterministic Parallel Logic Programming”, in Proceedings of the Sixth International Conference on Logic Programming, pp471–486, MIT Press,1989.Google Scholar
  3. [3]
    K. L. Clark & S. Gregory, “PARLOG: Parallel Programming in Logic”, in Concurrent Prolog: Collected papers ed. E. Shapiro, pp84–139, MIT Press, 1987Google Scholar
  4. [4]
    Jim Crammond, “A Comparative Study of Unification Algorithms for OR-Parallel Execution of Logic Languages”, IEEE Transactions on Computers, vol. C-34, no. 10, pp911–917, IEEE Computer Society, October 1985.Google Scholar
  5. [5]
    Jim Crammond, Implementation of committed choice logic languages on shared memory multiprocessors, PhD thesis, Dept. of Computer Science, Heriot-Watt University, Edinburgh, May 1988.Google Scholar
  6. [6]
    Gopal Gupta and Bharat Jayaraman, “Compiled And-Or Parallelism on Shared Memory Multiprocessors”, in Proceedings of the North American Conference on Logic Programming, Cleveland, pp 332–349, MIT Press, 1989.Google Scholar
  7. [7]
    Gopal Gupta and Bharat Jayaraman, “On Criteria for Or-Parallel Execution Models of Logic Programs”, in Proceedings of the 1990 North American Conference on Logic Programming, pp737–756, MIT Press, 1990.Google Scholar
  8. [8]
    Seif Haridi and Sverker Janson, “Kernel Andorra Prolog and its Computation Model”, in Logic Programming, Proceedings of the Seventh International Conference, pp 31–48, The MIT Press, 1990.Google Scholar
  9. [9]
    Manuel V. Hermenegildo, An Abstract Machine Based Execution Model for Computer Architecture Design and Efficient Implementation of Logic Programs in Parallel, PhD thesis. Department of Computer Sciences, The University of Texas at Austin, TR-86-20, August 1986.Google Scholar
  10. [10]
    Yow-Jian Lin, Vipin Kumar, “AND-parallel execution of Logic Programs on a Shared Memory Multiprocessor A Summary of Results”, in Proceedings of the Fifth International Conference and Symposium on Logic Programming, pp1123–1141, MIT Press, 1988.Google Scholar
  11. [11]
    Ewing Lusk, Ralph Butler, Terrence Disz, Robert Olson, Ross Overbeek, Rick Stevens, David H. D. Warren, Alan Calderwood, Peter Szeredi, Seif Haridi, Per Brand, Mats Carlsson, Andrzej Ciepielewski, Bogumil Hausman, “The Aurora Orarallel Prolog System”, in Proceedings of the International Conference on Fifth Generation Computer Systems, pp 819–830, ICOT, Tokyo, 1988.Google Scholar
  12. [12]
    B. Ramkumar, L. V. Kale, “Compiled Execution of the Reduce-OR Process Model on Multiprocessors”, in Proceedings of the North American Conference on Logic Programming, pp313–331, MIT Press, 1989.Google Scholar
  13. [13]
    Ehud Shapiro, “Concurrent Prolog: A Progress Report”, in Concurrent Prolog: collected papers, ed. E. Shapiro, pp157–187, MIT Press, 1987.Google Scholar
  14. [14]
    Ehud Shapiro, “The Family of Concurrent Logic Programming Languages”, ACM Computing Surveys, vol. 21, no 3, pp 413–510, ACM Press, New York, September 1989.Google Scholar
  15. [15]
    Kazunori Ueda, “Guarded Horn Clauses”, in Concurrent Prolog, collected papers, ed. E. Shapiro, pp 140–156, MIT Press, 1987.Google Scholar
  16. [16]
    David H.D. Warren, “An abstract Prolog instruction set”, Technical Report no 309, SRI International, Menlo Park, 1983.Google Scholar
  17. [17]
    David H. D. Warren, “Or-Parallel Execution Models of Prolog”, in TAPSOFT 87: Proceedings of the International Joint Conference on Theory and Practice of Software Development, Pisa, Italy, pp 244–259, Springer-Verlag, 1987.Google Scholar
  18. [18]
    David H. D. Warren, “The SRI model for or-parallel execution of Prolog — abstract design and implementation issues”, in Proceedings of the 1987 Symposium on Logic Programming, pp 92–102, IEEE Computer Society Press, 1987.Google Scholar
  19. [19]
    D. S. Warren, “Efficient Prolog Memory Management for Flexible Control Strategies”, in The 1984 International Symposium on Logic Programming, pp198–202, IEEE, 1984.Google Scholar
  20. [20]
    Harald Westphal, Philippe Robert, Jacques Chassin de Kergommeaux and Jean-Claude Syre, “The PEPSys Model: Combining Backtracking, AND-and OR-parallelism”, in Proceedings of the 4th Symposium on Logic Programming, pp 436–448, IEEE, 1987.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1991

Authors and Affiliations

  • Remco Moolenaar
  • Henk Van Acker
  • Bart Demoen
    • 1
  1. 1.Department of Computer ScienceKU LeuvenHeverleeBelgium

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