An ultra-multiprocessing machine architecture for efficient parallel execution of functional languages
In the execution of a functional program, a large number of function instances are dynamically created, and these created function instances are executed as fine grain concurrent processes. In order to implement massively parallel execution of such fine grain concurrent processes, ultra-multiprocessing mechanism must be designed in parallel machine architecture.
This paper proposes a machine architecture for massively parallel execution of functional programs. The machine performs parallel execution along a multithread control flow, which is called datarol. First, the datarol concept is discussed in comparison with the dataflow model. Next, a method to extract datarol program from a functional program is described through a dependency analysis. Then, a datarol machine architecture is described. The datarol processor offers a parallel execution mechanism for ultra-multiprocessing based on the continuation-based execution control mechanism. Finally, the evaluation of the datarol architecture is shown.
KeywordFunctional language Dataflow analysis Multiprocessing Massively parallel machine architecture Dataflow machine
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- Dennis,J.B: A Preliminary Architecture for a Basic Data Flow Processor, Proc. 2nd Ann. Symp. on Computer Architecture, 1975, pp.126–132.Google Scholar
- Arvind, Gostelow, K.P. and Plouffe, W.: An Asynchronous Programming Language and Computing Machine, Report TR114a, Dept. Inf. and Comp. Science, Univ. California, Irvine, 1978.Google Scholar
- Watson,I. and Gurd,J.: A Prototype Data Flow Computer with Token Labeling, Proc. NCC, pp.623–628, 1979.Google Scholar
- Amamiya,M., Hasegawa,R.,Nakamura,O. and Mikami,H.: A list-processing-oriented data flow machine architecture, Proc. NCC, AFIPS, 1982, pp.143–151.Google Scholar
- Darlington,J. and Reeve,M.J.: “ALICE”: A multiprocessor Reduction Machine, Proc. Conf. Functional Programming Languages and Computer Architecture, 1982, pp.65–75.Google Scholar
- Vegdahl, S.: A survey of proposed architecture for the execution of functional languages, IEEE Trans. on Computer, 33, 1984, pp.1050–1071.Google Scholar
- Amamiya,M.: A New Parallel Graph Reduction Model and Its Machine Architecture, Proc. ICPP, 1987, pp.47–50.Google Scholar
- Amamiya, M.: Dataflow computing and eager and lazy evaluations, New Generation Computing, Vol.2, 1984, pp.105–129.Google Scholar
- Amamiya,M., Takesue,M., Hasegawa,R. and Mikami,H.: Implementation and evaluation of a list-processing-oriented data flow machine, Proc. 13th Ann.Int. Conf. on Computer Architecture, 1986, pp.10–19.Google Scholar
- Amamiya, M. Hasegawa, R. and Ono, S.: Valid: A High-Level Functional Language for Data Flow Machine, Rev. ECL, Vol.32, No.5, pp.793–802, NTT, 1984.Google Scholar
- Sonoda,K., Ueda,T., Taniguchi,R. and Amamiya,M.: Processor Optimization and Load Control in Datarol Architecture, to appear in Proc. Joint Symposium on Parallel Processing, in Japanese, May, 1990.Google Scholar
- Tachibana, T., Taniguchi, R. and Amamiya, M.: Compiling Method of Functional Programming Language Valid by Data Flow Analysis — Extraction of Datarol Program —, Journal of Information Processing, Vol.30, No.12, pp.1628–1638, in Japanese, 1989.Google Scholar
- Ueda,T., Taniguchi,R. and Amamiya,M.: Datarol Processor: Its Design and Performance Evaluation, Proc. Computer System Workshop, CPSY 89-15, The Institute of Electronics, Information and Communication Engineers, in Japanese, 1989.Google Scholar
- Nikhil,R.S. and Arvind: Can Dataflow Subsume von Neumann Computing?, Proc. Ann. Int. Symp. on Computer Architecture, pp.262–272, 1989.Google Scholar
- Sakai,S., Yamaguchi,Y., Hiraki,K., Kodama,Y. and Yuba,T.: An Architecture of a Dataflow Single Chip Processor, Proc. Ann. Int. Symp. on Computer Architecture, pp.46–53, 1989.Google Scholar