Two polynomial problems in PLA folding

  • Claudio Arbib
VLSI Layout
Part of the Lecture Notes in Computer Science book series (LNCS, volume 484)


Block-folding and variable-folding are widely used techniques for reducing the physical area of Programmed Logic Arrays (PLA). Both block- and variable-folding problems are known to be NP-hard. We define the compatibility graph of a PLA as the complement of its column-disjoint graph, and prove that both block-folding and variable-folding can be solved in polynomial time on PLA whose compatibility graph does not contain a claw or a (K5 − e) as induced subgraph.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1991

Authors and Affiliations

  • Claudio Arbib
    • 1
  1. 1.Dipartimento di Ingegneria ElettronicaUniversità di Roma "Tor Vergata"RomaItaly

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