An efficient VLSI network bridge architecture for local area networks

  • Chandrabhan Chevli
  • Hee Yong Youn
Computer Architecture, Concurrency, Parallelism, Communication And Networking
Part of the Lecture Notes in Computer Science book series (LNCS, volume 468)


The growth of local area networks (LANs) has raised an important issue of efficient interconnection of LANs. Network bridge was introduced to address this issue and it provides an interconnection channel between multiple independent LANs. The existing network bridge, however, is not efficient for bridging a large number of LANs because the bridging is accomplished at the cooperation of separately packaged processors in a serial fashion. In this paper, we present a new VLSI architecture which provides an efficient bridging mechanism for multiple LANs. By processing the bridge operation in parallel, in a single chip, our design achieves a few orders of magnitude speed-up compared to the traditional design. It can also be easily expanded to accommodate a large number of LANs.


Communication VLSI LAN Interconnection Network Bridge Fault Tolerance 


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Copyright information

© Springer-Verlag Berlin Heidelberg 1991

Authors and Affiliations

  • Chandrabhan Chevli
    • 1
  • Hee Yong Youn
    • 1
  1. 1.Department of Computer ScienceUniversity of North TexasDenton

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