Design and simulation of a multistage interconnection network

  • Rudolf Holzner
  • Stefan Tomann
Interconnection Networks
Part of the Lecture Notes in Computer Science book series (LNCS, volume 457)


An interconnection network for a high-performance parallel computer for database, Lisp and Prolog applications is currently being developed. To meet the requirements derived from applications a multistage interconnection network is chosen. The selection of the switching elements and their optimization was done by simulation with randomly distributed load patterns as well as with traces from applications. The proposed network is composed of 8 × 8 crossbar switches with four independent packet buffers per input port. Each switch will be contained in a single VLSI-chip. The network will operate with a bandwidth of 20 Mbytes/sec on each communication channel.

Key Words

buffering scheme crossbar switch delta network network simulation parallel computer virtual cut-through 


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7. References

  1. Hutner 89.
    Hutner F., ”Evaluation of Alternative Switch Types for a Delta Network”, Siemens internal report No. SYS 3-BeG009/89 (in german)Google Scholar
  2. Reyzl 90.
    Reyzl E., Eckardt H., ”Performance Evaluation For High-Performance Interconnection Networks”, Proc. of ”ITG/GI-Fachtagung Architektur von Rechensystemen”, Munich, 1990, VDE-Verlag, DüsseldorfGoogle Scholar
  3. Siegel 86.
    Siegel H.J., ”Interconnection Networks for Large-Scale Parallel Processing”, Lexington Books, Lexington, 1986Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1990

Authors and Affiliations

  • Rudolf Holzner
    • 1
  • Stefan Tomann
    • 1
  1. 1.Siemens AGZFE IS SYS 32München 83W. Germany

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