Optimizing microprograms for recurrent loops on pipelined architectures using timed Petri nets

  • Claire Hanen
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 424)


Mapping high-level program specifications onto microprogrammable pipelines raises complex scheduling problems. This paper studies the problem of optimizing the throughput of microprograms for recurrent vector loops on a quite general architecture model, taking into account many resource requirements, in particular register allocation. For a given architecture and a given loop specification, it is shown that the feasible microprograms are solutions of a cyclic scheduling problem modelled with a Timed Petri net. A resolution graph that represents the behaviour of the net is built. Critical cycles of this graph are then used to build cyclic optimal solutions.


Timed Petri nets cyclic scheduling software pipelining 


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  1. [AIK88]
    A. AIKEN, A. NICOLAU. Optimal loop parallelization. Proc. of the SIGPLAN'88 Conf. on Prog. Language Design an Implementation, Atlanta, USA, June 1988 pp. 308–317.Google Scholar
  2. [CHC88a]
    J. CARLIER, P.CHRETIENNE. Timed Petri Nets schedules. Advances in Petri nets, Springer Verlag, 1988.Google Scholar
  3. [CHC88b]
    J. CARLIER, P. CHRETIENNE. Les problemes d'ordonnancements. Masson, Paris, febuary 1988.Google Scholar
  4. [CHR83]
    P.CHRETIENNE. Les réseaux de Petri temporisés. Thèse d'état, Université M. CURIE, 1983.Google Scholar
  5. [CHR85]
    P.CHRETIENNE. Timed Event graphs: A complete study of their controlled executions. Proc of the International workshop on timed Petri nets, Turin, 1985.Google Scholar
  6. [CYT84]
    R. CYTRON. Compile-time scheduling and optimization for asynchronous machines. P.H.D. Thesis, Univ. of Illinois at Urbana-Champaign, 1984.Google Scholar
  7. [EIS88a]
    C.EISENBEIS. Optimization of Horizontal microcode generation for Loop structures. Proc. of the 1988 ACM Int. Conf. on Super-computing, St Malo, France, July 1988, pp 453–465.Google Scholar
  8. [EIS88b]
    C. EISENBEIS, W. JALBY, A. LICHNEWSKY. Squeezing more CPU performance out of a CRAY-2 by vector block scheduling. Research report no 841, INRIA, may 1988.Google Scholar
  9. [ELL86]
    J.R. ELLIS. Bulldog: A compiler for VILW architectures. M.I.T. Press, 1986.Google Scholar
  10. [GOO88]
    J.R.GOODMAN, W.-C.HSU. Code scheduling and register allocation in large basic blocks. Proc. of the 1988 ACM Int. Conf. on Super-computing, St Malo, France, July 1988, pp 442–452.Google Scholar
  11. [HAN86]
    C. HANEN, P. CHRETIENNE, J. CARLIER. Modelling and Optimizing Pipelines with Timed Petri Nets Proc. of the 7th Eur. Work. on Th. and Appl. of Petri Nets, Oxford, GB 1986, pp 433–447.Google Scholar
  12. [HAN87]
    C. HANEN. Problèmes d'ordonnancement des architectures pipelines: modélisation, optimisation, algorithmes. Thèse d'université, Rapport MASI no 193, Univ. Paris VI, September 1987.Google Scholar
  13. [HAN88]
    C.HANEN. Optimizing horizontal microprograms for vectorial loops with timed Petri nets. Proc of the 1988 ACM international conference on supercomputing, St Malo, France 1988, pp. 466–477.Google Scholar
  14. [KOG81]
    P. M. KOGGE. The architecture of Pipelined computers. New York, Mc Graw Hill, 1981.Google Scholar
  15. [LAN80]
    D.LANDSKOV, S.DAVIDSON, B.SHRIVER, P.W.MALLETT. Local microcode Compaction techniques. ACM Computing Surveys, Vol.12, no3, September 1980.Google Scholar
  16. [NIC88]
    A. NICOLAU. Loop quantization: a generalized loop unwinding technique. Journal of Parallel and Distributed Computing 5, 1988, pp. 568–586.Google Scholar
  17. [PAT76]
    J.H. PATEL, E.S. DAVIDSON. Improving the throughput of a pipeline by insertion of delays. I.E.E.E. 3rd Ann. Symp. on computer architecture, january 1976.Google Scholar
  18. [RAM73]
    C. RAMCHANDANI. Analysis of asynchronous concurrent systems by timed Petri nets. P.H.D. Thesis, T.R. no 120, MIT, Cambridge, USA 1973.Google Scholar
  19. [SHA72]
    L.E. SHAR. Design and scheduling of statically configured pipelines. Stanford Univ., T.R. no 42, 1972.Google Scholar
  20. [SIF80]
    J. SIFAKIS. Performance evaluation of systems using nets. Net Theory and applications. Lecture Notes in Computer Science 84, pp. 307–319, Springer-Verlag Berlin 1980Google Scholar
  21. [TOK81]
    M.TOKORO, E.TAMURA, T.TAZIZUKA. Optimization of microprograms. IEEE trans. on Computers, Vol C-30, no7, July 1981.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1990

Authors and Affiliations

  • Claire Hanen
    • 1
  1. 1.Laboratoire MASIUniversité P. et M. CurieParisFrance

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