New simulations between CRCW PRAMs

Abstract

This paper is part of a continued investigation of the relative power of different variants of the CRCW PRAM with infinite global memory. The models that we consider are the standard Priority and Common PRAMs, together with the less well-known Collision ⁺ and Tolerant PRAMs. We describe several new results for the simulation of an n-processor Priority PRAM on weaker machines:

• (1) on an n-processor Tolerant PRAM: Slowdown $O\left( {\sqrt {log{\text{ }}n} } \right)$;

• (2) on an n-processor Collision ⁺ PRAM: Slowdown O(log log n log⁽³⁾ n);

• (3) on a Common PRAM with kn processors (k≤log n/2): Slowdown O(log n/(k log(log n/k)));

• (4) on a Tolerant PRAM with kn processors (2≤k≤log n): Slowdown O(log n/log k);

• (5) on a randomized n-processor Collision ⁺ PRAM: Expected slowdown O(log log n).

Supported by the Deutsche Forschungsgemeinschaft, SFB 124, TP B2, VLSI Entwurfsmethoden und Parallelität.

Part of the research was carried out while the author was at Instytut Informatyki, Uniwersytet Warszawski.