Special function unit for statistical aggregation functions

  • Mahdi Abdelguerfi
Part of the Lecture Notes in Computer Science book series (LNCS, volume 368)


This paper presents the design of a special purpose MOS processing unit for statistical aggregation functions such as SUM, COUNT, and AVERAGE. Tuples are input to and output from the proposed unit in parallel, one bit at a time. The processing of tuples is completely overlapped with their I/O time. The function unit is composed of a number of identical bit-serial structures operating in parallel. The architecture and VLSI implementation of the proposed unit is considered. The performance of the proposed design is compared with the implementation of statistical aggregation functions on the parallel pipelined relational query processor described in [1]. The comparative analysis shows that our approach performs significantly better than that of [1].

Index terms

Database Machines Statistical Aggregation Functions Parallel Processing Bit-Serial Architecture Odd-even Network VLSI 


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

V. References

  1. [1]
    Won Kim, et al, “A Parallel Pipelined Relational Query Processor”, ACM Trans. on Database Systems, Vol.9, No.2, June 1984, pp.214–242.Google Scholar
  2. [2]
    Batcher, K.E., “Sorting Network and Their Applications,” AFIPS Proc. Spring Joint Comput. Conf., Vol. 32, April, 1968, pp. 307–314.Google Scholar
  3. [3]
    Batcher, K.E., “Bit-Serial Parallel Processing Systems,” IEEE Trans. Comput., C-31, 1982, pp. 377–384.Google Scholar
  4. [4]
    Hatamian, M., Cash, G.L., “Parallel Bit-Level Pipelined VLSI Designs for High-Speed Signal Processing,” Proc. of the IEEE, Vol. 75, No. 9, September, 1987, pp. 1192–1202.Google Scholar
  5. [5]
    Mohan, S., Sood, A.K., “A Multiprocessor Architecture for the (M,L)-Algorithm Suitable for VLSI Implementation,” IEEE Trans. on Comm., Vol. COM-39, No. 12, December, 1986, pp. 1218–1226.Google Scholar
  6. [6]
    Sood, A.K., Abdelguerfi, M., Shu, W., “Hardware Implementation of Relational Algebra Operations,” in Database Machines: Modern Trends and Applications, Nato ASI, Series F, Springer Verlag, 1986, pp. 341–380.Google Scholar
  7. [7]
    Mead, C., Conway, L., Introduction to VLSI Systems, Reading, Massachsetts: Addison-Wesley, 1980.Google Scholar
  8. [8]
    Bonucelli, M.A., et al., “External Sorting in VLSI”, IEEE Trans. on Comp., Vol. C-33, No. 10, oct. 1984, pp. 931–934.Google Scholar
  9. [9]
    Abdelguerfi, M., et al., “Parallel Bit-Level Pipelined VLSI Design for the Histogramming Operation,” IEEE Computer Conference on Vision and Pattern Recognition, Univ. of Michigan, June 1988, pp.945–950.Google Scholar
  10. [10]
    Abdelguerfi, M., Sood, A.K., “A Bus Connected Cellular Array Unit For Relational Database Machines.” in Database Machines and Knowledge Base Machines, edited by Kitsuregawa, M. and Tanaka. H., Kluwer Academic Publishers, 1988, pp. 188–201.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1989

Authors and Affiliations

  • Mahdi Abdelguerfi
    • 1
  1. 1.Department of Electrical EngineeringUniversity of DetroitDetroit

Personalised recommendations