Extended Abstract
This is a preview of subscription content, log in via an institution to check access.
Preview
Unable to display preview. Download preview PDF.
Reference
K. Yamanishi, "On algebraic-geometrical extension of the class of alternant codes," Proc. 9th ITA Symp., pp. 127–132, Oct. 1986 (in Japanese).
S. Miura, "A note on algebraic geometrical codes," ibid., pp. 133–138, Oct. 1986 (in Japanese).
S. Sakata, "Synthesizing the two-dimensional linear feedback shift-register with minimal number of storage devices that can generate a given two-dimensional array," ibid., pp. 203–208, Oct. 1986.
S. Hirasawa, M. Kasahara, Y. Sugiyama, and T. Namekawa, "A further result on the generalized version of the concatenated codes," ibid., pp. 59–64, Oct. 1986.
T. Yamada, "Unequal error protection with generalized versions of product and concatenated codes," ibid., pp. 69–74, Oct. 1986 (in Japanese).
T. Kasami and S. Lin, "On the binary weight distribution of some Reed-Solomon codes," Proc. 7th ITA Symp., pp. 49–54, Nov. 1984.
W. Yoshida, N. Nakamura, and K. Imamura, "On binary weight distribution of Reed-Solomon codes," Proc. 9th ITA Symp., pp. 139–142, Oct. 1986 (in Japanese).
T. Suematsu and H. Imai, "Methods for evaluating error correcting codes based on a compound channel model," Trans. IECE Japan, vol. J68-A, no.5, pp. 474–480, May 1985 (in Japanese).
T. Suematsu and H. Imai, "A three-state compound channel model," Proc. 9th ITA Symp. pp. 75–59, Oct. 1986 (in Japanese).
T. Takata, T. Fujiwara, T. Kasami, and S. Lin, "Analysis of a cascaded coding scheme with interleaved outer code," ibid., pp. 93–98, Oct. 1986.
H. Imai ed., Essentials of Error-Correcting Coding Techniques. Tokyo, Nippon Kogyo Gijutsu Center (in Japanese).
O. Yamada, "Error correcting code for Japanese teletext using coded transmission," Trans. IECE Japan, vol.J67-B, no.4, pp. 439–446, April 1984 (in Japanese).
A. Yamagishi, "Encoder and decoder LSIs for BCH code and RS code," Proc. WCTA 86, Yokohama Japan, pp. 7–9, Aug. 1986 (in Japanese).
K. Iwamura, H. Imai, and Y. Dohi, "Code-length and error-correcting capability selectable Reed-Solomon CODEC chips," Proc. 9th ITA Symp., pp. 171–175, Oct. 1986 (in Japanese).
H. Yoshida et al., "A note on decoding of RS code using Galois field logic," ibid., pp. 167–170, Oct. 1986 (in Japanese).
K. Ohnish et al., "A Reed-Solomon code processing LSI for digital audio," presented at ISIT 86, Ann Arbor, Oct. 1986.
K. Iwamura, H. Imai, and Y. Dohi, "A construction method for Reed-Solomon CODEC suitable for VLSI design, "Paper of Technical Group, IT 86, IECE Japan, Jan. 1987 (in Japanese).
S. Kubota, T. Kohri, and S. Kato, "A SST (scarce state transition) type Viterbi decoder," Trans. IECE Japan, vol.J68-B, no.1, pp. 38–45, Jan. 1985 (in Japanese).
S. Kato et al., "Generalized TDMA LSI," Paper of Technical Group, SAT86-5, IECE Japan, May 1986 (in Japanese).
Y. Hirata and Y. Yasuda, "Application of FEC coding to satellite communications," Proc. WCTA 86, Yokohama Japan, pp. 23–25, Aug. 1986 (in Japanese).
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1989 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Imai, H., Matsumoto, T. (1989). Coding theory and its applications in Japan. In: Huguet, L., Poli, A. (eds) Applied Algebra, Algebraic Algorithms and Error-Correcting Codes. AAECC 1987. Lecture Notes in Computer Science, vol 356. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-51082-6_86
Download citation
DOI: https://doi.org/10.1007/3-540-51082-6_86
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-51082-6
Online ISBN: 978-3-540-46150-0
eBook Packages: Springer Book Archive