VLSI arrays implementing parallel line-drawing algorithms

  • Valeriu Beiu
Submitted Papers
Part of the Lecture Notes in Computer Science book series (LNCS, volume 342)


After a short description of the problems encountered in graphic systems concerning the image memory, the first part of this paper describes several algorithms which are easily parallelizable. The second part shows possible VLSI arrays implementing the above mentioned algorithms and area and time estimations.

Index terms

Graphics line-drawing algorithms parallel algorithms VLSI arrays VLSI-based architecture area-time complexity 


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Copyright information

© Springer-Verlag Berlin Heidelberg 1989

Authors and Affiliations

  • Valeriu Beiu
    • 1
  1. 1.Department of Control and Computer SciencePolytechnical Institute of BucharestBucharestRomania

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