Skip to main content
SpringerLink
Log in
Book cover

International Workshop on Embedded Computer Systems

SAMOS 2001: Embedded Processor Design Challenges pp 112–134Cite as

Structured Scheduling of Recurrence Equations: Theory and Practice

  • Chapter
  • First Online:

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2268))

Abstract

We present new methods for scheduling structured systems of recurrence equations. We introduce the notion of structured dependence graph and structured scheduling. We show that the scheduling of recurrence equations leads to integer linear programs whose practical complexity is O(n3), where n is the number of constraints. We give new algorithms for computing linear and multi-dimensional structured scheduling, using existing techniques for scheduling non-structured systems of affine recurrence equations. We show that structured scheduling is more than one order of magnitude more efficient than the scheduling of corresponding inlined systems.

This is a preview of subscription content, log in via an institution.

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Karp, R., Miller, R., Winograd, S.: The organization of computations for uniform recurrence equations. Journal of the ACM 14 (1967) 563–590

    Article  MATH  MathSciNet  Google Scholar 

  2. Lamport, L.: The Parallel Execution of DO Loops. Communications of The ACM 17 (1974) 83–93

    Article  MATH  MathSciNet  Google Scholar 

  3. Feautrier, P.: Some efficient solutions to the affine scheduling problem, part I, one dimensional time. Int. J. of Parallel Programming 21 (1992) 313–348

    Article  MATH  MathSciNet  Google Scholar 

  4. Wolf, M., Lam, M.: Loop transformation theory and an algorithm to maximize parallelism. IEEE Transactions on Parallel and Distributed Systems 2 (1991) 452–471

    Article  Google Scholar 

  5. Darte, A., Khachiyan, L., Robert, Y.: Linear scheduling is nearly optimal. Parallel Processing Letters 1 (1991) 73–81

    Article  Google Scholar 

  6. Kung, H.: Why systolic architectures? Computer 15 (1982) 37–46

    Article  Google Scholar 

  7. Lee, P., Kedem, Z.: Mapping nested loop algorithms into multidimensional systolic arrays. IEEE Transaction On Parallel and Distributed System 1 (90) 64–76

    Google Scholar 

  8. Moldovan, D.: On the analysis and synthesis of VLSI systolic arrays. IEEE Transactions on Computers 31 (1982) 1121–1126

    Article  MATH  Google Scholar 

  9. Mauras, C., Quinton, P., Rajopadhye, S., Saouter, Y.: Scheduling affine parameterized recurrences by means of variable dependent timing functions. In Kung, S.E.E. Swartzlander, J., Fortes, J., Przytula, K., eds.: Application Specific Array Processors, IEEE Computer Society Press (1990) 100–110

    Google Scholar 

  10. Ashcroft, E., Wadge, W.: Lucid, a formal system for writing and proving programs. SIAM j. Comp. 3 (1976) 336–354

    Article  MathSciNet  Google Scholar 

  11. Caspi, P., Halbwachs, N., Pilaud, D., Plaice, J.: Lustre: a declarative language for programming synchronous systems. In: 14th Symposium on Principles of Programming Languages, ACM, Munich (1987)

    Google Scholar 

  12. Le Guernic, P., Benveniste, A., Bournai, P., Gautier, T.: SIGNAL: A data flow oriented language for signal processing. In: IEEE Workshop on VLSI 1984. (1984)

    Google Scholar 

  13. Chen, M., Choo, Y., Li, J. In: Crystal: Theory and Pragmatics of Generating Efficient Parallel Code. ACM Press (1991) Chapter 7

    Google Scholar 

  14. Perrin, G., Genaud, S., Violard, E.: PEI: a theoretical framework for data-parallel programming. Technical report, ICPS, Strasbourg (1994)

    Google Scholar 

  15. Mauras, C.: Alpha: un langage équationnel pour la conception et la programmation d’architectures parallèles synchrones. Thèse de doctorat, Ifsic, Université de Rennes 1 (1989)

    Google Scholar 

  16. Dupont De Dinechin, F., Robert, S., Risset, T.: Structured scheduling of recurrence equations. Technical Report 1140, Irisa, Rennes, France (1997)

    Google Scholar 

  17. Wilde, D.: The Alpha language. Technical Report 827, Irisa, Rennes, France (1994)

    Google Scholar 

  18. Saouter, Y.: A propos de systèmes d’équations récurrentes. Thèse de doctorat, Ifsic, Université de Rennes 1 (1992)

    Google Scholar 

  19. Darte, A.: Techniques de parallélisation automatique de nids de boucles. Thèse de doctorat, LIP ENS-Lyon (1993)

    Google Scholar 

  20. Feautrier, P.: Some efficient solution to the affine scheduling problem, part II, multidimensional time. Int. J. of Parallel Programming 21 (1992)

    Google Scholar 

  21. Chaudhary, V., Xu, C.Z., Roy, S., Ju, J., Sinha, V., Luo, L.: Design and evaluation of an environment ape for automatic parallelization of programs. In: Int. Symp. on Parallel Architectures, Algorithms, and Networks. (1996) 77–83

    Google Scholar 

  22. Irigoin, F., Jouvelot, P., R. Triolet: Overview of the PIPS project. In: Procs of the Int. Workshop on Compiler for Parallel Computers, Paris. (1990) 199–212

    Google Scholar 

  23. Raji-Werth, M., Feautrier, P.: On parallel program generation for massively parallel architectures. In Durand, M., Dabaghi, F.E., eds.: High Performance Computing II, North-Holland (1991)

    Google Scholar 

  24. Griebl, M., Lengauer, C.: The loop parallelizer LooPo. In Gerndt, M., ed.: Proc. Sixth Workshop on Compilers for Parallel Computers. Volume 21 of Konferenzen des Forschungszentrums Jülich. Forschungszentrum Jülich (1996) 311–320

    Google Scholar 

  25. Burleson, W.: Using regular array methods for DSP module synthesis. In: 27th Hawaii Int. Conf. System Science Vol 1: Architecture. (1994) 58–67

    Google Scholar 

  26. Catthoor, F., Danckaert, K., Kulkarni, C., Omnes, T.: Data transfer and storage architecture issues and exploration in multimedia processors. In: Programmable Digital Signal Processors: Architecture, Programming, and Applications. Marcel Dekker, Inc, New York (2000)

    Google Scholar 

  27. Kienhuis, B., Rijpkema, E., Deprettere, E.: Compaan: Deriving process networks from matlab for embedded signal processing architectures. In: 8th International Workshop on Hardware/Software Codesign (CODES’2000). (2000)

    Google Scholar 

  28. Dupont de Dinechin, F., Quinton, P., Risset, S.R.T.: First steps in alpha. Publication Interne 1244, Irisa (1999)

    Google Scholar 

  29. De Dinechin, F.D., Quinton, P., Risset, T.: Structuration of the Alpha language. In Giloi, W., Jahnichen, S., Shriver, B., eds.: Massively Parallel Programming Models, IEEE Computer Society Press (1995) 18–24

    Google Scholar 

  30. Dupont De Dinechin, F.: Libraries of schedule-free operators in Alpha. In: Application Specific Array Processor. (1997)

    Google Scholar 

  31. Crop, J., Wilde, D.: Scheduling Structured Systems. In: Fifth International Europar Conference. LNCS, Toulouse, France, Springer Verlag (1999) 409–412

    Google Scholar 

  32. Darte, A., Robert, Y.: Scheduling uniform loop nests. Technical Report 92-10, Laboratoire de l’Informatique du Parallélisme, Ecole Normale Supérieure de Lyon, France (1992)

    Google Scholar 

  33. Feautrier, P.: Parametric integer programming. RAIRO Recherche Opérationnelle 22 (1988) 243–268

    MATH  MathSciNet  Google Scholar 

  34. Schrijver, A.: Theory of Linear and Integer Programming. John Wiley and Sons, New York (1986)

    MATH  Google Scholar 

  35. Darte, A., Vivien, F.: Revisiting the decomposition of Karp, Miller and Winograd. In: Application Specific Array Processor. (1997) 13–25

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Irisa, Campus de Beaulieu, 35042, Rennes Cedex, France

    Patrice Quinton

  2. LIP, ENS Lyon, 46 allée d’Italie, 69364, Lyon Cedex 07

    Tanguy Risset

Authors
  1. Patrice Quinton
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Tanguy Risset
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Editors and Affiliations

  1. Leiden Institute of Advanced Computer Science (LIACS), Leiden University, Niels Bohr Weg 1, 2333, Leiden, CA, The Netherlands

    Ed F. Deprettere

  2. Computer Engineering Laboratory (DATE) Department of Electrical Engineering and Information Technology, University of Paderborn, Warburger Str.100, 33100, Paderborn, Germany

    Jürgen Teich

  3. Computer Engineering Laboratory Electrical Engineering Department, ITS, Delft University of Technology, Mekelweg 4, 2628, CD Delft, The Netherlands

    Stamatis Vassiliadis

Rights and permissions

Reprints and permissions

Copyright information

© 2002 Springer-Verlag Berlin Heidelberg

About this chapter

Cite this chapter

Quinton, P., Risset, T. (2002). Structured Scheduling of Recurrence Equations: Theory and Practice. In: Deprettere, E.F., Teich, J., Vassiliadis, S. (eds) Embedded Processor Design Challenges. SAMOS 2001. Lecture Notes in Computer Science, vol 2268. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45874-3_7

Download citation

  • DOI: https://doi.org/10.1007/3-540-45874-3_7

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-43322-4

  • Online ISBN: 978-3-540-45874-6

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation