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Iterative Compilation

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Embedded Processor Design Challenges (SAMOS 2001)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2268))

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Abstract

In this paper, we give an overview of a novel approach to the problem of how to select compiler optimizations, their parameters, and the order in which to employ them. In particular, we concentrate on the problem of how to select tile sizes and unroll factors simultaneously. We approach this problem in an architecturally adaptive manner by means of iterative compilation, where we generate many versions of a program and decide upon the best by actually executing them and measuring their execution time. We evaluate several iterative strategies. We compare the levels of optimization obtained by iterative compilation to several well-known static techniques and show that we outperform each of them on a range of benchmarks across a variety of architectures. Next we discuss how to incorporate static models as a means to filter out certain combinations of transformations that are unlikely to produce good results. Finally, we show that the approach is applicable to real programs by employing the technique to three SPECfp benchmarks.

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Knijnenburg, P.M.W., Kisuki, T., O’Boyle, M.F.P. (2002). Iterative Compilation. In: Deprettere, E.F., Teich, J., Vassiliadis, S. (eds) Embedded Processor Design Challenges. SAMOS 2001. Lecture Notes in Computer Science, vol 2268. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45874-3_10

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  • DOI: https://doi.org/10.1007/3-540-45874-3_10

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