Abstract
Wire load has become an important variable for power and timing optimization. As standard cell geometries are shrinking and average wirelength increases due to increasing design complexities wire capacitance has become dominant over gate capacitance. However the wire load of a net not only depends on wirelength but also on which metal layer a net is routed. In this paper we investigate the characteristics of metal layers and propose a power driven routing scheme, which exploits the different metal layer properties in deep submicron semicustom design flows. Layer assignment for final routing will be done according to the switching activity of a net and the layer characteristics. In section 3 we describe the investigation of the characteristics of routing layers. A parameter for the validation of metal layers for use in routing for low-power is derived. In sections 4 and 5 an objective function for power driven routing and the layer assignment methodology is described.
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© 2002 Springer-Verlag Berlin Heidelberg
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Windschiegl, A., Zuber, P., Stechele, W. (2002). Exploiting Metal Layer Characteristics for Low-Power Routing. In: Hochet, B., Acosta, A.J., Bellido, M.J. (eds) Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2002. Lecture Notes in Computer Science, vol 2451. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45716-X_6
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DOI: https://doi.org/10.1007/3-540-45716-X_6
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