Optimised Predecessor Data Structures for Internal Memory

  • Naila Rahman
  • Richard Cole
  • Rajeev Raman
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2141)


We demonstrate the importance of reducing misses in the translation-lookaside buffer (TLB) for obtaining good performance on modern computer architectures. We focus on data structures for the dynamic predecessor problem: to maintain a set S of keys from a totally ordered universe under insertions, deletions and predecessor queries. We give two general techniques for simultaneously reducing cache and TLB misses: simulating 3-level hierarchical memory algorithms and cache-oblivious algorithms. We give preliminary experimental results which demonstrate that data structures based on these ideas outperform data structures which are based on minimising cache misses alone, namely B-tree variants.


Search Tree Main Memory Secondary Memory External Node Cache Block 
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  1. 1.
    L. Arge, J. S. Vitter. Optimal Dynamic Interval Management in External Memory (extended abstract). FOCS 1996, pp. 560–569.Google Scholar
  2. 2.
    A. Andersson. Faster Deterministic Sorting and Searching in Linear Space. In Proc. 37th IEEE FOCS, pp. 135–141, 1996.Google Scholar
  3. 3.
    Bender, M., Cole, R. and Raman. R. Exponential trees for cache-oblivious algorithms. In preparation, 2001.Google Scholar
  4. 4.
    Bender, M., Demaine, E. and Farach-Colton, M. Cache-oblivous B-trees. In Proc. 41st IEEE FOCS, pp. 399–409, 2000.Google Scholar
  5. 5.
    Comer, D. The Ubiquitous B-Tree. ACM Comput. Surv. 11 (1979), p. 121.zbMATHCrossRefGoogle Scholar
  6. 6.
    Frigo, M., Leiserson, C. E., Prokop, H., and Ramachandran, S. Cache-oblivious algorithms. In Proc. 40th IEEE FOCS, pp. 285–298, 1999.Google Scholar
  7. 7.
    Furber, S. B. Arm System-On-Chip Architecture Addison-Wesley Professional, 2nd ed., 2000.Google Scholar
  8. 8.
    Hennessy, J. L. and Patterson, D. A. Computer Architecture: A Quantitative Approach (Second ed.). Morgan Kaufmann, 1996.Google Scholar
  9. 9.
    D. E. Knuth. The Art of Computer Programming. Volume 3: Sorting and Searching, 3rd ed. Addison-Wesley, 1997.Google Scholar
  10. 10.
    Ladner, R. E., Fix, J. D., and LaMarca, A. Cache performance analysis of traversals and random accesses. In Proc. 10th ACM-SIAM SODA (1999), pp. 613–622.Google Scholar
  11. 11.
    LaMarca, A. and Ladner, R. E. The influence of caches on the performance of sorting. J. Algorithms 31, 66–104, 1999.CrossRefMathSciNetGoogle Scholar
  12. 12.
    Korda, M. and Raman, R. An experimental evaluation of hybrid data structures for searching. In Proc. 3rd WAE, LNCS 1668, pp. 213–227, 1999.Google Scholar
  13. 13.
    Mehlhorn, K. and Sanders, P. Accessing multiple sequences through set-associative cache, 2000. Prel. vers. Proc. 26th ICALP, LNCS 1555, 1999.Google Scholar
  14. 14.
    H. Prokop. Cache-oblivious algorithms. MS Thesis, MIT, 1999.Google Scholar
  15. 15.
    Rahman, N. and Raman, R. Analysing cache effects in distribution sorting. ACM J. Exper. Algorithmics, WAE’ 99 special issue, to appear. Prel. vers. in Proc. 3rd WAE, LNCS 1668, pp. 184–198, 1999.Google Scholar
  16. 16.
    Rahman, N. and Raman, R. Analysing the cache behaviour of non-uniform distribution sorting algorithms. In Proc. 8th ESA, LNCS 1879, pp. 380–391, 2000.Google Scholar
  17. 17.
    Rahman, N. and Raman, R. Adapting radix sort to the memory hierarchy. TR 00-02, King’s College London, 2000, Prel. vers. in Proc. ALENEX 2000.Google Scholar
  18. 18.
    Sen, S. and Chatterjee, S. Towards a theory of cache-efficient algorithms (extended abstract). In Proc. 11th ACM-SIAM SODA (2000), pp. 829–838.Google Scholar
  19. 19.
    Sleator, D. D. and Tarjan, R. E. Amortized efficiency of list update and paging rules. Communications of the ACM 28, 202–208, 1995.CrossRefMathSciNetGoogle Scholar
  20. 20.
    Sun Microsystem. UltraSPARC User’s Manual. Sun Microsystems, 1997.Google Scholar
  21. 21.
    Vitter, J. S. External memory algorithms and data structures: Dealing with MASSIVE data. To appear in ACM Computing Surveys, 2000.Google Scholar
  22. 22.
    D. E. Willard. Reduced memory space for multi-dimensional search trees. In Proc. STACS’ 85, pages 363–374, 1985.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Naila Rahman
    • 1
  • Richard Cole
    • 2
  • Rajeev Raman
    • 3
  1. 1.Department of Computer ScienceKing’s College LondonUK
  2. 2.Computer Science DepartmentCourant Institute, New York UniversityUSA
  3. 3.Department of Maths and Computer ScienceUniversity of LeicesterUK

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