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Optimised Predecessor Data Structures for Internal Memory

  • Naila Rahman
  • Richard Cole
  • Rajeev Raman
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2141)

Abstract

We demonstrate the importance of reducing misses in the translation-lookaside buffer (TLB) for obtaining good performance on modern computer architectures. We focus on data structures for the dynamic predecessor problem: to maintain a set S of keys from a totally ordered universe under insertions, deletions and predecessor queries. We give two general techniques for simultaneously reducing cache and TLB misses: simulating 3-level hierarchical memory algorithms and cache-oblivious algorithms. We give preliminary experimental results which demonstrate that data structures based on these ideas outperform data structures which are based on minimising cache misses alone, namely B-tree variants.

Keywords

Search Tree Main Memory Secondary Memory External Node Cache Block 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Naila Rahman
    • 1
  • Richard Cole
    • 2
  • Rajeev Raman
    • 3
  1. 1.Department of Computer ScienceKing’s College LondonUK
  2. 2.Computer Science DepartmentCourant Institute, New York UniversityUSA
  3. 3.Department of Maths and Computer ScienceUniversity of LeicesterUK

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