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Motivation from a Full-Rate Specific Design to a DSP Core Approach for GSM Vocoders

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Field-Programmable Logic and Applications (FPL 2001)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2147))

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Abstract

The Global System for Mobile (GSM) communications uses a 13Kbps vocoder which expands to 22.8Kbps after channel coding. To increase the user capacity the half-rate channel has a gross transfer rate of 11.4Kbps. The vocoder for the half-rate channels operates at 5.6Kbps. To obtain better performance, GSM introduced enhanced full-rate vocoder which operates at 12.2Kbps. The computational requirements of these vocoders require the design of an entirely new digital signal processing architecture geared towards 1-D signal and speech processing. In this paper, at first the architecture of a specific design for full-rate vocoder is introduced, then according to the results of this architecture and common features available in all three vocoders, a DSP Core for implementing these vocoders is suggested. The architecture of the DSP Core is characterized by pipelining and parallel operation of functional units. This Core is a 16-bit fixed-point processor implemented on an FPGA and can be used as a real-time GSM vocoder.

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Author information

Authors and Affiliations

  1. Computer Engineering Department, Iran University of Science and Technology, Iran

    Shervin Sheidaei & Ahmad Akbari

  2. Computer Engineering Department, AmirKabir University of Technology, Iran

    Hamid Noori & Hosein Pedram

Authors
  1. Shervin Sheidaei
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  2. Hamid Noori
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  3. Ahmad Akbari
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  4. Hosein Pedram
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Editor information

Editors and Affiliations

  1. Division of Informatics, University of Edinburgh, James Clerk Maxwell Building Mayfield Road, EH9 3JZ, Edinburgh, UK

    Gordon Brebner

  2. School of Electrical and Electronic Engineering, Queen’s University of Belfast, Ashby Building Stranmillis Road, BT9 5AH, Belfast, UK

    Roger Woods

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© 2001 Springer-Verlag Berlin Heidelberg

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Sheidaei, S., Noori, H., Akbari, A., Pedram, H. (2001). Motivation from a Full-Rate Specific Design to a DSP Core Approach for GSM Vocoders. In: Brebner, G., Woods, R. (eds) Field-Programmable Logic and Applications. FPL 2001. Lecture Notes in Computer Science, vol 2147. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44687-7_40

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  • DOI: https://doi.org/10.1007/3-540-44687-7_40

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-42499-4

  • Online ISBN: 978-3-540-44687-3

  • eBook Packages: Springer Book Archive

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