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Virtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2147))

Abstract

This paper presents an FPGA solution for a high-speed front-end digital receiver of an Electronic Support Measures (ESM) system. An LMS-based adaptive predictor has been chosen to improve the signal-to-noise ratio (SNR) of the received radar signals. Two fine-grained pipelined architectures based on the Delay LMS (DLMS) algorithm have been developed for FPGA implementation. This paper also highlights the importance of choosing a suitable filter architecture in order to utilise FPGA resources resulting in a more efficient implementation. FPGA implementation results, including timing and area, are given and discussed.

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References

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© 2001 Springer-Verlag Berlin Heidelberg

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Ting, LK., Woods, R., Cowan, C. (2001). Virtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver. In: Brebner, G., Woods, R. (eds) Field-Programmable Logic and Applications. FPL 2001. Lecture Notes in Computer Science, vol 2147. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44687-7_38

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  • DOI: https://doi.org/10.1007/3-540-44687-7_38

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-42499-4

  • Online ISBN: 978-3-540-44687-3

  • eBook Packages: Springer Book Archive

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