This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA. From a high level description of the FPGA architecture, the basic tools such a placer, a router or an editor are automatically generated. The description is not constrained by any model, so that abstract architectures, such as virtual FPGAs, can directly exploit the tool set as their basic programming tools.
Keywords
- Virtual Machine
- Systolic Array
- Logic Block
- Programming Tool
- FPGA Device
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.