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Placing, Routing, and Editing Virtual FPGAs

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Part of the Lecture Notes in Computer Science book series (LNCS,volume 2147)


This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA. From a high level description of the FPGA architecture, the basic tools such a placer, a router or an editor are automatically generated. The description is not constrained by any model, so that abstract architectures, such as virtual FPGAs, can directly exploit the tool set as their basic programming tools.


  • Virtual Machine
  • Systolic Array
  • Logic Block
  • Programming Tool
  • FPGA Device

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  • DOI: 10.1007/3-540-44687-7_37
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© 2001 Springer-Verlag Berlin Heidelberg

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Lagadec, L., Lavenier, D., Fabiani, E., Pottier, B. (2001). Placing, Routing, and Editing Virtual FPGAs. In: Brebner, G., Woods, R. (eds) Field-Programmable Logic and Applications. FPL 2001. Lecture Notes in Computer Science, vol 2147. Springer, Berlin, Heidelberg.

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-42499-4

  • Online ISBN: 978-3-540-44687-3

  • eBook Packages: Springer Book Archive

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