Abstract
Modeling in a hardware decription language offers the opportunity to experiment with various implementations of a design without regarding technological constraints. A model of an FPGA is a base for a very flexible design, allowing to add and remove any of its features. This paper describes the modeling of a special FPGA (Xlinx XC6216) in Verilog using only the Xilinx documentation. Some of the implementation details and problems are presented in this text.
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References
XC6200 Field Programmable Gate Array. Xilinx Inc., 1997.
Alexander Glasmacher: Entwurf und Implementierung der Zellmatrix eines FPGAs als Verilogmodell. Studienarbeit, Fachbereich Elektrotechnik und Informatik, Universität Siegen, 2000.
Kai Woska: Entwurf und Implementierung der Steuerlogik eines FPGAs als Verilogmodell. Studienarbeit, Fachbereich Elektrotechnik und Informatik, Universität Siegen, 2000.
Christine Bauer, Peter Zipf, H. Wojtkowiak: System Design with Genetic Algorithms. Submitted to FPL 2000.
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© 2000 Springer-Verlag Berlin Heidelberg
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Glasmacher, A., Woska, K. (2000). Design and Implementation of an XC6216 FPGA Model in Verilog. In: Hartenstein, R.W., Grünbacher, H. (eds) Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing. FPL 2000. Lecture Notes in Computer Science, vol 1896. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44614-1_48
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DOI: https://doi.org/10.1007/3-540-44614-1_48
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