Abstract
This position paper1 discusses reconfigurability issues in low-power hand-held multimedia systems. A reconfigurable systems-architecture is introduced, with a focus on a Field Programmable Function Array (FPFA). Application domain specific algorithms determine the granularity of FPFA processor tiles. Several algorithms are discussed and mapped onto a FPFA processor tile.
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© 2000 Springer-Verlag Berlin Heidelberg
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Heysters, P.M., Smit, J., Smit, G.J.M., Havinga, P.J.M. (2000). Mapping of DSP Algorithms on Field Programmable Function Arrays. In: Hartenstein, R.W., Grünbacher, H. (eds) Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing. FPL 2000. Lecture Notes in Computer Science, vol 1896. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44614-1_43
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DOI: https://doi.org/10.1007/3-540-44614-1_43
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Print ISBN: 978-3-540-67899-1
Online ISBN: 978-3-540-44614-9
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