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International Conference on Formal Methods in Computer-Aided Design

FMCAD 2000: Formal Methods in Computer-Aided Design pp 127–144Cite as

Checking Safety Properties Using Induction and a SAT-Solver

Part of the Lecture Notes in Computer Science book series (LNCS,volume 1954)

Abstract

We take a fresh look at the problem of how to check safety properties of finite state machines. We are particularly interested in checking safety properties with the help of a SAT-solver. We describe some novel induction-based methods, and show how they are related to more standard fixpoint algorithms for invariance checking. We also present preliminary experimental results in the verification of FPGA cores. This demonstrates the practicality of combining a SAT-solver with induction for safety property checking of hardware in a real design flow.

Keywords

  • Model Check
  • Transition Relation
  • Safety Property
  • Reachable State
  • Symbolic Model Check

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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  • DOI: 10.1007/3-540-40922-X_8
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References

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Author information

Authors and Affiliations

  1. Prover Technology AB, Alströmergatan 22, 2tr, SE-112 47, Stockholm, Sweden

    Mary Sheeran & Gunnar Stålmarck

  2. Chalmers University of Technology, SE-412 96, Göteborg, Sweden

    Mary Sheeran & Gunnar Stålmarck

  3. Xilinx Inc., 2100 Logic Drive, CA95124, San Jose, California, USA

    Satnam Singh

Authors
  1. Mary Sheeran
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  2. Satnam Singh
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  3. Gunnar Stålmarck
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Editor information

Editors and Affiliations

  1. Austin Research Laboratories, IBM Corporation, Mail Stop 9460, Building 904 11501 Burnet Road, 78758, Austin, Texas, USA

    Warren A. Hunt Jr.

  2. Computer Science Department, Indiana University, Lindley Hall, 150 W. Woodlawn Avenue, 47405-7104, Bloomington, Indiana, USA

    Steven D. Johnson

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© 2000 Springer-Verlag Berlin Heidelberg

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Sheeran, M., Singh, S., Stålmarck, G. (2000). Checking Safety Properties Using Induction and a SAT-Solver. In: Hunt, W.A., Johnson, S.D. (eds) Formal Methods in Computer-Aided Design. FMCAD 2000. Lecture Notes in Computer Science, vol 1954. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-40922-X_8

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  • DOI: https://doi.org/10.1007/3-540-40922-X_8

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-41219-9

  • Online ISBN: 978-3-540-40922-9

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