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Dynamic Voltage and Frequency Scaling for Scientific Applications

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Book cover Languages and Compilers for Parallel Computing (LCPC 2001)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2624))

Abstract

Dynamic voltage and frequency scaling (DVFS) of the CPU has been shown to be one of the most effective ways to reduce energy consumption of a program. This paper discusses the benefit of dynamic voltage and frequency scaling for scientific applications under different optimization levels. The reported experiments show that there are still many opportunities to apply DVFS to the highly optimized codes, and the profitability is significant across the benchmarks. It is also observed that there are performance and energy consumption tradeoffs for different optimization levels in the presence of DVFS. While in general compiling for performance will improve energy usage as well, in some cases the less successful optimization lead to higher energy savings. Finally, a comparison of the benefits of operating system support versus compiler support for DVFS is discussed.

This research was partially supported by NSF CAREER award No. CCR-9985050.

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Hsu, CH., Kremer, U. (2003). Dynamic Voltage and Frequency Scaling for Scientific Applications. In: Dietz, H.G. (eds) Languages and Compilers for Parallel Computing. LCPC 2001. Lecture Notes in Computer Science, vol 2624. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-35767-X_6

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  • DOI: https://doi.org/10.1007/3-540-35767-X_6

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  • Print ISBN: 978-3-540-04029-3

  • Online ISBN: 978-3-540-35767-4

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