Part of the NanoScience and Technology book series (NANO)


Complementary Metal Oxide Semiconductor Inversion Layer Very Large Scale Integration Silicon Chip Drain Induce Barrier Lowering 
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1.4 Further Reading

  1. 1.
    C.Y. Chang and S.M. Sze, ULSI Technology, McGraw-Hill, New York (1996)Google Scholar
  2. 2.
    S. Luryi, I. Xu, A. Zaslovsky, Future Trends in Microelectronics-The Road Ahead, J. Wiley, New York (1999)Google Scholar
  3. 3.
    R. Campano, Technology Roadmap for European Nanoelectronics, EC (2000)Google Scholar
  4. 4.
    K. Brunner, Rep. Prog. Phys. 65 27 (2002)CrossRefGoogle Scholar
  5. 5.
    International Technology Roadmap for Semiconductors, 2003 EditionGoogle Scholar
  6. 6.
    C. Teichert, Physics Reports, Vol.365 Number 5–6 (2002)Google Scholar

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© Springer-Verlag Berlin Heidelberg 2005

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