Coding and decoding algorithms of Reed-Solomon codes executed on a M68000 microprocessor

  • Francisco J. García-Ugalde
Part of the Lecture Notes in Computer Science book series (LNCS, volume 311)


This paper presents a comparison of different algebraic methods for decoding Reed-Solomon (RS) codes. Three kinds of decoding algorithms have been studied, two of them are «time domain» algorithms, while the third employs a transform decoding method. We achieve with this development, measurements that will permit the selection of the method with optimal decoding in the case of one future microprogramming implementation. Optimal decoding implies that the faster algorithm is the best one. It can be concluded that acceptable RS decoders can be constructed with microprocessors only for low speed transmission rates.

Indexing terms

Cyclic codes error-correcting codes Reed-Solomon codes simulation of Reed-Solomon codes decoding algorithms 


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [1]
    R.F. Rice, "Channel coding and data compression system considerations for efficient communication of planetary imaging data", Tech. Memo. 33-695, Jet Propulsion Laboratory, Pasadena, CA, June 1974.Google Scholar
  2. [2]
    A. Hauptschein, "Practical, high performance concatenated coded spread spectrum channel for JTIDS", in Proc. Nat. Telecommun. Conf. 1977, p. 35: 4–1 to 4–8.Google Scholar
  3. [3]
    K.Y. Liu and J. Lee, "An experimental study of the concatenated Reed-Solomon/Viterbi channel coding system performance and its impact on space communications", in Proc.Nat. Telecommun. Conf., 1981.Google Scholar
  4. [4]
    K.Y. Liu and K.T. Woo, "The effects on receiver tracking phase error on the performance of concatenated Reed-Solomon/Viterbi channel coding system", in Proc. Nat.Telecommun. Conf., 1980, pp. 51.5.1–51.5.5.Google Scholar
  5. [5]
    Odenwalder et al, "Hybrid coding system study", submited to NASA Ames Research Center Linkabit Co. San Diego, CA, Final Rep., Contract NAS-2-6722, Sept. 1972.Google Scholar
  6. [6]
    W.W. Peterson and E.J. Weldon, Jr, Error-Correcting Codes, Cambridge MA: MIT Press, 1972.Google Scholar
  7. [7]
    R.L. Miller, T.K. Truong and I. S. Reed, "Efficient program for decoding the (255,223) Reed-Solomon code over GF(28) with both errors and erasures, using transform decoding", IEEE Proc. Vol. 127, Pt. E, No.4, July 1980.Google Scholar
  8. [8]
    I.S. Reed, T.K. Truong and R.L. Miller, "Simplified algorithm for correcting both errors and erasures of Reed-Solomon codes", IEE Proc., Vol. 126, No.10, October 1979.Google Scholar
  9. [9]
    E. Lenormand, "Réalisation d'un codeur-décodeur (31,15) de Reed-Solomon", Revue Technique Thomson-CSF, Vol.12,No.3,September 1980.Google Scholar
  10. [10]
    R.E. Blahut, "Transform techniques for error control codes", IBM J. Res. Develop., Vol.23, No.3, May 1979.Google Scholar
  11. [11]
    I.S. Reed, T.K. Truong and R.L. Miller, "Decoding of B.C.H. and R. S. codes with errors and erasures using continued fractions", Electronics Letters, Vol.15, No.17, 16th August 1979.Google Scholar
  12. [12]
    F. Mac Williams and N. Sloane, The Theory of Error-Correcting Codes, Amsterdam: North-Holland Publishing Co., 1977.Google Scholar
  13. [13]
    In-Shek Hsu, I.S. Reed, T.K. Truong, Ke Wang, Chiunn-Shyong Yeh and L.J. Deutsch, "The VLSI implementation of a Reed-Solomon encoder using Berlekamp's bit-serial multiplier algorithm", IEEE Trans. on Computers,Vol.C-33, No.10, October 1984.Google Scholar
  14. [14]
    Kuang Yung Liu, "Architecture for VLSI design of Reed-Solomon decoders", IEEE Trans. on Computers, Vol.C-33, No.2, February 1984.Google Scholar
  15. [15]
    F.J. García Ugalde, "Les performances des codes de Reed-Solomon sur un canal discret sans memoire", X Colloque sur le Traitement du Signal et ses Applications, Nice du 20 au 24 Mai 1985, pp.619–624.Google Scholar
  16. [16]
    E.R. Berlekamp, Algebraic Coding Theory, New York, McGraw-Hill, 1968.Google Scholar
  17. [17]
    J.L. Massey, "Shift-register synthesis and BCH decoding", IEEE Trans. on Inform. Theory, Vol.IT-15, pp.122–127, Jan. 1969.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1988

Authors and Affiliations

  • Francisco J. García-Ugalde
    • 1
  1. 1.División de Estudios de Posgrado Facultad de Ingeniería, UNAMC. UniversitariaMexico, D.F.

Personalised recommendations