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Least-squares iterative solution on a fixed-size VLSI architecture

  • E. P. Papadopoulou
  • T. S. Papatheodorou
Session 9B: Algorithms, Architectures And Performance II
Part of the Lecture Notes in Computer Science book series (LNCS, volume 297)

Abstract

The VLSI implementation of the Accelerated Overrelaxation (AOR) method, when used for the accurate computation of the least-squares solutions of overdetermined systems, is the problem addressed here. As the size of this computational task is usually very large, we use space-time domain expansion techniques to partition the computation and map it onto a fixed size VLSI architecture.

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Copyright information

© Springer-Verlag Berlin Heidelberg 1988

Authors and Affiliations

  • E. P. Papadopoulou
    • 1
  • T. S. Papatheodorou
    • 2
  1. 1.Mathematics and Computer ScienceClarkson Univ.Potsdam
  2. 2.C.T.I. and Dept of Computer Eng.Univ. of PatrasGreece

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