A flexible architectural study methodology

  • Steven Tighe
  • Ken Zink
  • Richard Brice
  • William Alexander
Performance Modelling And Simulation
Part of the Lecture Notes in Computer Science book series (LNCS, volume 279)


An efficient emulation/simulation system for evaluating architectures and scheduling strategies for reduction systems is described. Execution traces of example programs are generated by the emulator. The execution method of the emulator exercises all possible parallelism available in the execution model under study. The trace of each program execution is then reduced to an “architecturally neutral” precedence graph. The precedence graph can then be used repeatedly in simulations to study the effects of changes in architecture or scheduling strategy.


Program Execution Process Node Execution Model Execution Trace Trace File 


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Copyright information

© Springer-Verlag Berlin Heidelberg 1987

Authors and Affiliations

  • Steven Tighe
    • 1
  • Ken Zink
    • 1
  • Richard Brice
    • 1
  • William Alexander
    • 2
  1. 1.Parallel Processing Program, MCCUSA
  2. 2.Database Program, MCCUSA

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