A flexible architectural study methodology
An efficient emulation/simulation system for evaluating architectures and scheduling strategies for reduction systems is described. Execution traces of example programs are generated by the emulator. The execution method of the emulator exercises all possible parallelism available in the execution model under study. The trace of each program execution is then reduced to an “architecturally neutral” precedence graph. The precedence graph can then be used repeatedly in simulations to study the effects of changes in architecture or scheduling strategy.
KeywordsProgram Execution Process Node Execution Model Execution Trace Trace File
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