Toward the design of a parallel graph reduction machine the MaRS project
We have presented our stepwise approach to the design of an architecture for a multiprocessor reduction machine, starting from requirements induced by the language and by architectural considerations.
Perhaps the most important feature of the machine is the load balancing mechanism, that includes the decentralized computation and distribution of an instantaneous load information, allowing tasks to be equally distributed among processors. Furthermore, this load information allows each reduction processor to dynamically change its execution model, thus contributing to the regulation of the instantaneous parallelism in the machine. We also saw how information concerning management of potential parallelism can be conveyed by combinators themselves.
More details of this architecture, such as the network organization, garbage collector, etc., and details concerning compilation, can be found in [Castan85, Castan86a, Castan86b, Lemaître86].
Unable to display preview. Download preview PDF.
- [Arvind83]Arvind, R.A. Iannucci Two fundamental issues in multiprocessing: The Data Flow solution MIT/LCS/TM-241, September 1983.Google Scholar
- [Bawden77]A. Bawden, R. Greenblatt, J. Holloway Lisp machine progress report, MIT memo ≠444, 1977.Google Scholar
- [Berger80]Ph. Berger, D. Comte, N. Hifdi, B. Pelois, J.C. Syre Mise en oeuvre d'un prototype de multiprocesseur en assignation unique Rapport final, TEAU 18, ONERA-CERT, 1980.Google Scholar
- [Castan80]M. Castan Conception et réalisation d'une machine spécialisée dans le traitement des formes arborescentes. Thèse de troisième cycle, Octobre 1980, UPS Toulouse, France.Google Scholar
- [Castan85]M. Castan, M.H. Durand, M. Lemaître A set of combinators for abstraction in linear space September 1985, to be published in Information Processing LettersGoogle Scholar
- [Castan86a]M. Castan, G. Durrieu, B. Lecussan, M. Lemaître Etude sur le parallélisme non vectoriel dans les applications aéronautiques: mécanismes de base de la machine MaRS, machine multiprocesseurs à réduction symbolique. Rapport final no 1/3244/DERI, Volume 2, Janvier 86.Google Scholar
- [Castan86b]M. Castan, M. H. Durand, G. Durrieu, B. Lecussan, M. Lemaître MaRS: a multiprocessor machine for parallel graph reduction Hawaii International Conference on System Sciences, Honolulu, January 1986.Google Scholar
- [Chu81]Y. Chu, M. Abrams Programming languages and direct execution computer architecture, Computer, July 1981.Google Scholar
- [Church41]A. Church The calculi of lambda-conversion Ann. of Math. studies, Princeton, N.J. 1941, 2nd ed. 1951.Google Scholar
- [Darlington81]J. Darlington, M. Reeve ALICE, a multiprocessor reduction machine for the parallel evaluation of applicative languages Proc. of the Conference on functional programming languages and computer architecture. October 1981, Portsmouth, New Hampshire.Google Scholar
- [Durrieu86]G. Durrieu LAURA: a parallel non vectorial data driven processor for aeronautic workstations Hawaii International Conference on System Sciences, Honolulu, January 1986.Google Scholar
- [Feustel73]E.A. Feustel On the advantages of the tagged architecture IEEE Transactions on Computer, Vol 22, No 4, 1973Google Scholar
- [Friedman78]D.P. Friedman, D.S. Wise CONS should not evaluate its arguments Michaelson and Milnes Eds., Automata, Languages and Programming, Edindurgh University Press, 1976.Google Scholar
- [Greussay77]P. Greussay Contribution à la définition interprétative et à l'implémentation des lambda languages Thèse d'état, Université de Paris VI, Novembre 1977.Google Scholar
- [Hankin85]C.L. Hankin, P.E. Osmon, M.J. Shute COBWEB: A combinator reduction architecture Functional Languages and Computer Architecture, Nancy France, September 1985.Google Scholar
- [Henderson80]P. Henderson Functional Programming, application and implementation Prentice Hall International, 1980Google Scholar
- [Henderson82]P. Henderson Purely Functional Operating Systems, in Functional programming and its applications, Darlington, Henderson, Turner Eds. Cambridge University Press, 1982.Google Scholar
- [Hudak84]P. Hudak, B. Goldberg Experiments in diffused combinator reduction ACM Symposium on Lisp and Functional Programming, Austin Texas, August 1984.Google Scholar
- [Keller84]R.M. Keller, F.C.H. Lin, J. Tanaka Rediflow Multiprocessing Proc. IEEE Compcon, February 1984Google Scholar
- [Lemaître86]M. Lemaître, M. Castan, M.H. Durand, G. Durrieu, B. Lecussan Mechanism for efficient multiprocessor combinator reduction ACM Symposium on Lisp and Functional Programming, Cambridge Massachusetts, August 1986Google Scholar
- [McCarthy60]J. Mc Carthy Recursive functions of symbolic expressions and their computation by machines CACM Vol 3, n° 4, April 1960Google Scholar
- [Stoye84]W.R. Stoye, T.J. Clarke, A.C. Norman Some practical methods for rapid combinator reduction ACM Symposium on Lisp and Functional Programming, Austin Texas, August 1984Google Scholar
- [Stoye86]W.R. Stoye Message Based Functional Operating Systems Science of Computer Programming, 6 (1986).Google Scholar
- [Treleaven82]P.C. Treleaven Computer architecture for functional programming, in Functional Programming and its Application, J. Darlington, P. Henderson, D.A. Turner (eds), Cambridge University Press, 1982Google Scholar
- [Turner79]D.A. Turner A new implementation technique for applicative languages Software practice and experience, vol. 9, 1979.Google Scholar
- [Vegdhal84]S.R. Vegdhal A survey of proposed architectures for the execution of functional languages IEEE Transaction on computers, C-33(12), December 1984.Google Scholar