Skip to main content
SpringerLink
Log in
Book cover

Workshop on Graph Reduction

GR 1986: Graph Reduction pp 114–118Cite as

Parallel graph reduction on a supercomputer: A status report

  • Graph Reduction On Existing Architectures
  • Conference paper
  • First Online:

  • 174 Accesses

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 279))

Abstract

We describe an ongoing effort to develop a parallel graph reduction run-time system hosted on a multiprocessor supercomputer. This run-time system is presently augmented by the functional language compiler of the ALFALFA system. Admittedly, parallel graph reduction is hardly a novel idea. The interesting notion is the provision of a parallel execution environment sufficiently powerful to support development of large prototypical scientific and symbolic codes in a functional language. This will allow the investigation of the functional programming paradigm within these application domains in an empirical fashion. In this paper, we discuss the motivation for the effort, describe the basic elements of the implementation, and provide some preliminary insight distilled from our experience with an initial version of the run-time system.

This work was performed under the auspices of the Department of Energy.

This is a preview of subscription content, log in via an institution.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

6. References

  1. Bobrowicz, F., "The Los Alamos Multitasking Control Library," Los Alamos National Laboratory unclassified release (in preparation).

    Google Scholar 

  2. Cray Research, Inc., CRAY X-MP Series Mainframe Reference Manual, HR-0032 (1982), Cray Research, Inc.

    Google Scholar 

  3. Hudak, P., "ALFL Reference Manual and Programmer's Guide," Research report YALEU/DCS/RR-322, 2nd ed., Computer Science Department, Yale University, October 1984.

    Google Scholar 

  4. Hudak, P., and Goldberg, B., "Distributed execution of functional programs using serial combinators," Proc. 1985 International Conference on Parallel Processing, August 1985, pp. 831–839.

    Google Scholar 

Download references

Author information

Author notes

  1. Lauren Smith

    Present address: Department of Defense, 9800 Savage Road, 20755, Fort Meade, MD

Authors and Affiliations

  1. Computing and Communications Division, Los Alamos National Laboratory, 87545, Los Alamos, NM

    Randy Michelsen, Lauren Smith, Elizabeth Williams & Bonnie Yantis

Authors
  1. Randy Michelsen
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Lauren Smith
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Elizabeth Williams
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Bonnie Yantis
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Lauren Smith .

Editor information

Joseph H. Fasel Robert M. Keller

Rights and permissions

Reprints and permissions

Copyright information

© 1987 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Michelsen, R., Smith, L., Williams, E., Yantis, B. (1987). Parallel graph reduction on a supercomputer: A status report. In: Fasel, J.H., Keller, R.M. (eds) Graph Reduction. GR 1986. Lecture Notes in Computer Science, vol 279. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-18420-1_52

Download citation

  • DOI: https://doi.org/10.1007/3-540-18420-1_52

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-18420-1

  • Online ISBN: 978-3-540-47963-5

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation