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Toward a high performance parallel inference machine — The intermediate stage plan of PIM —

  • Atsuhiro Goto
  • Shun-ichi Uchida
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 272)

Abstract

The parallel inference machine (PIM) is the most important hardware research target of the FGCS project. The initial stage mainly aimed to conduct R&D of individual component technologies by studying parallel inference mechanisms from various standpoints. Three basic mechanisms for PIM were studied by software simulators and by developing experimental machines with about 16 modules: the reduction mechanism, the data flow mechanism and the kabu-wake method. PIM R&D in the initial stage revealed the structures and characteristics important to an effective PIM. It also clarified many of the problems associated with the development of more practical experimental systems. In the intermediate stage, both parallel hardware mechanisms and parallel software systems will be studied based on a philosophy that integrates both the hardware and software aspects of the research. Component hardware modules will be developed with the accumulation of implementation techniques such as appropriate hardware building blocks and common software tools. Realistic software research environments will be provided by connecting PSIs to encourage kernel language implementation and parallel operating system development. Efforts to integrate them into a total PIM system will start around the middle of the intermediate stage.

Keywords

Logic Program Processing Element Logic Programming Language Parallel Software Parallel Inference 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. [1]
    T. Chikayama. Unique features of ESP. In Proc. of the International Conference on Fifth Generation COmputer Systems, Tokyo, 1984.Google Scholar
  2. [2]
    A. Goto and S. Uchida. Current Research Status of PIM: Parallel Inference Machine. TM 140, ICOT, 1985. (Third Japan-Sweden workshop on Logic Programming, Tokyo).Google Scholar
  3. [3]
    K. Hwang and F.A. Briggs. Computer Architecture and Parallel Processing. McGraw-Hill, 1984.Google Scholar
  4. [4]
    N. Ito, A. Kishi, E. Kuno, and K. Rokusawa. The Dataflow-Based Parallel Inference Machine to Support Two Basic Languages in KL1. In IFIP TC-10 Working Conference on Fifth Generation Computer Architecture, July 1985.Google Scholar
  5. [5]
    N. Ito and K. Masuda. Parallel Inference Machine Based on the Data Flow Model. In Proceedings of International Workshop on High-Level Computer Architecture, pages 431–440, Los Angels, May 1984.Google Scholar
  6. [6]
    N. Ito, M. Sato, A. Kishi, E. Kuno, and K. Rokusawa. The Architecture and Preliminary Evaluation Results of the Experimental Parallel Inference Machine PIM-D. In Proc. of the 13th Annual International Symposium on Computer Architecture, June 1986.Google Scholar
  7. [7]
    N. Ito, H. Shimizu, A. Kishi, E. Kuno, and K. Rokusawa. Data-flow based execution mechanisms of Parallel and Concurrent Prolog. New Generation Computing, 3(1):15–41, February 1985.Google Scholar
  8. [8]
    K. Kumon, H. Masuzawa, A. Itashiki, K. Satoh, and Y. Sohma. Kabu-wake: A New Parallel Inference Method and its Evaluation. In COMPCON Spring 86, pages 168–172, IEEE Computer Society, San Francisco, March 1986.Google Scholar
  9. [9]
    K. Murakami, K. Kakuta, R. Onai, and N. Ito. Research on parallel machine architecture for Fifth-Generation Computer Systems. IEEE Computer, 18(6), June 1985.Google Scholar
  10. [10]
    K. Nakajima, M. Yokota, K. Taki, S. Uchida, H. Nishikawa, A. Yamamoto, and M. Mitui. Evaluation of PSI Micro-Interpreter. In COMPCON Spring 86, pages 173–177, IEEE Computer Society, San Francisco, March 1986.Google Scholar
  11. [11]
    R. Onai, M. Aso, H. Shimizu, K. Masuda, and A. Matsumoto. Architecture of a Reduction-Based Parallel Inference Machine:PIM-R. New Generation Computing, 3(2):197–228, June 1985.Google Scholar
  12. [12]
    R. Onai, H. Shimizu, K. Masuda, and M. Aso. Analysis of Sequential Prolog Programs. TR 048, ICOT, May 1984.Google Scholar
  13. [13]
    R. Onai, H. Shimizu, K. Masuda, A. Matsumoto, and M. Aso. Architecture and Evaluation of a Reduction-Based Parallel Inference Machine: PIM-R. In Lecture Note in Computer Science, Springer-Verlag, to appear.Google Scholar
  14. [14]
    E. Y. Shapiro. A subset of Concurrent Prolog and Its Interpreter. TR 003, ICOT, 1983.Google Scholar
  15. [15]
    Y. Sohma, K. Satoh, K. Kumon, H. Masuzawa, and A. Itashiki. A New Parallel Inference Mechanism Based on Sequential Processing. In IFIP TC-10 Working Conference on Fifth Generation Computer Architecture, July 1985.Google Scholar
  16. [16]
    S. Takagi, T. Yokoi, S. Uchida, T. Kurokawa, T. Hattori, T. Chikayama, K. Sakai, and J. Tsuji. Overall design of SIMPOS. In Proc. of the Second International Logic Programming Conference, Uppsala, 1984.Google Scholar
  17. [17]
    K. Taki and et al. Hardware Design and Implementation of the Personal Sequential Inference Machine (PSI). In Proc. of the International Conference on Fifth Generation Computer Systems, Tokyo, 1984.Google Scholar
  18. [18]
    K. Ueda. Guarded Horn Clauses. TR 103, ICOT, 1985.Google Scholar
  19. [19]
    David H.D. Warren. An Abstract Prolog Instruction Set. Technical Note 309, Artificial Intelligence Center, SRI, 1983.Google Scholar
  20. [20]
    M. Yokota and et al. A Microprogrammed Interpreter for the Personal Sequential Inference Machine. In Proc. of the International Conference on Fifth Generation Computer Systems, Tokyo, 1984.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1987

Authors and Affiliations

  • Atsuhiro Goto
    • 1
  • Shun-ichi Uchida
    • 1
  1. 1.Fourth Research LaboratoryInstitute for New Generation Computer Technology (ICOT)TokyoJapan

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