An overview of DDC: Delta driven computer
In this paper we present an overview of the DDC "Delta Driven Computer" and the state of this research project at the end of 1986.
DDC is a parallel inference computer, composed by a set of PCM (Processor, Communication Device, Memory) nodes interconnected. It is currently under design at BULL Research Center.
From a conceptual point of view, DDC executes a language based on production rules, called VIM Virtual Inference Machine. This execution is made following the forward chaining strategy. Given a set of rules and a set of initial facts, the only mode of operation of the machine is the saturation (all conclusions are found).
VIM is an intermediate language; so, part of the project is the study of how to translate from a high level language to this intermediate language. The high level languages which we are thinking about are declarative ones (i.e. Logic Programming or Functional Programming).
The execution of VIM is possible by the DDEM Delta Driven Execution Model. The parallelism in the machine is achieved by distributing the facts among PCM nodes and by firing rules independently in each processor.
One goal of this project is to have a first prototype (including both hardware and software) at the end of 1987, so we try to prove that the parallelism handled by the model/machine has a valuable rate cost/performance.
KeywordsHash Function Logic Program Logic Programming Functional Programming High Level Language
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